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大家新年好！先跟各位分享个好消息： LSI Completes Acquisition of
SandForce, Inc. on January 4, 2012 . 所以中国从今年开始诚招SQA和Firmware工程师了 当然，我们一如既往地诚邀IC硬件研发工程师！ J 有意者，请将简历发至：Tracey.zheng@lsi.com 如有任何疑问，请发送邮件至Tracey.zheng@lsi.com或拨打电话021-24191709. 也可加我msn: zql975504@hotmail.com 或者微博啊：http://www.weibo.com/u/1752448637 LSI上海研发中心位于徐汇区中山南二路徐汇苑大厦（8万人体育场对面） 1.
Software Quality Assurance(SQA)
Education and Experience Requirements BS in Electrical Engineering, Computer Science, or Computer Engineering is required with 6+ years of firmware development. M.S. preferred with 4+ years in software / hardware validation Knowledge, Skills, and Abilities -
Quick learner with high level of self-motivation and dedication, with ability to deliver high quality products on time -
Meticulous, methodical, uncompromising, and creative in testing -
Experience in software debugging, problem creation and trapping -
Experience in devising testing / validation methodology is strong plus -
Communicate effectively in a team, able to multitask effectively in fast-paced environment. -
Understanding of NAND Flash concepts, knowledge of Flash management techniques, including wear leveling, garbage collection (strong plus). -
Knowledge and hands-on experience with storage protocols is preferred (SAS / SATA) 2.
Firmware Engineer Education and Experience Requirements BS in Electrical Engineering, Computer Science, or Computer Engineering is required with 6+ years of firmware development. M.S. preferred with 4+ years in firmware development. Knowledge, Skills, and Abilities -
Must demonstrate expertise in design and implementation of event-driven, real time firmware solutions using C/C++ programming -
Must be able to work with ASIC and software engineers in a collaborative environment -
Quick learner with high level of self-motivation and dedication, with ability to deliver high quality products on time -
Must have an excellent computer science background and demonstrated strength in designing efficient embedded firmware for storage or networking products -
Firmware/System debug skills utilizing debugger, protocol analyzer is required -
Good understanding of RTOS concepts including task switching, deadlocks, and resource management issues is required -
High level of skill in problem recreation, trapping and resolution, possess good written and verbal communication skills.
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Communicate effectively in a team, able to multitask effectively in fast-paced environment. -
Understanding of NAND Flash concepts, knowledge of Flash management techniques, including wear leveling, garbage collection (optional but strong plus). -
Knowledge and hands-on experience with storage protocols is preferred (SAS / SATA) 3.
Read Channel Verification Engineer JOB DESCRIPTION: As a member of the Read Channel team, candidate must be willing to work as an extended member of the design team. Duties will include functional verification of Storage read channel mixed-signal IP. Candidate will be expected to contribute to design and development of System Verilog based verification environment and will be responsible for verification closure of block/chip/system level functions for mixed signal based IP. Experience with System Verilog and functional coverage methodologies are required. Must be willing to follow a disciplined verification methodology and to work closely with a multi-location, international design team. Excellent teamwork and communication skills are required. PREFERRED EXPERIENCE: BSEE with 3-5+ years of design and/or verification experience required, MSEE preferred. Required knowledge and skills: - Expertise in System Verilog required - Good understanding of Digital Signal Processing - Good understanding of Analog and Digital Circuits - Very good analytical/debugging skill - Good verbal and written communication skills Desirable skills: - Knowledge of Verilog-AMS, Perl - Knowledge of verification methodologies including functional coverage and constrained random testing - Knowledge of VLSI design flows & DFT - Familiarity of high level programming language - Experience working with globally distributed team 4.
Digital Design Engineer-Shanghai Job Responsibilities Working with an Architecture/Algorithm Development Team to finalize system architecture for optimal implementation of digital signal processing algorithms, including architectural definition and tradeoffs, die size, power estimation. Skill required: Digital logic design, verilog coding, logic synthesis, both RTL and gate level verification, formal verification and static timing analysis. Unix shell, Perl scripting, C/RTL co-simulation. Sound theory background of communication and Digital signal processing. 5.
Preamp Analog Mixed Signal Design Engineer Job Description - Design high speed analog and mixed-signal integrated circuits within custom chips for the hard disk drive and tape drive industry - Work directly with customers to determine system requirements, write specifications and guide customers in the use of pre-amplifier products - Use high speed electronic characterization equipment to evaluate and debug the functionality of the design once the part is fabricated in silicon - Provide technical leadership through all phases of product development including test, yield, characterization, reliability analysis, qualification and release to manufacturing Requirements/Qualifications (Education) - Minimum three years experience in discrete, transistor level analog circuit design - Experience with analog and mixed signal IC product design, integration and verification is require - Strong physical layout knowledge and parasitic component understanding essential - Process and device physics knowledge critical - Proven skills using electronic measurement equipment in a lab environment - Expertise in applied magnetism and recording a strong plus
6.
ASIC Customer Engineer-Shanghai Job Description - LSI Corporation offers an excellent opportunity to contribute to a team environment and to grow personal career path. You will be working with internal and external customers to develop state of the art IC solutions utilizing LSI's leading edge CMOS cell-based ASIC technologies. You will have responsibility for ASIC designs through all of the key development and implementation phases including RTL analysis, synthesis, design optimization, timing verification, simulation, test insertion, physical design, vector generation, and post-prototype test support. Candidates will have opportunity to work on the latest 40nm/28nm designs. Requirements/Qualifications (Education) Education: BS/MS Electrical, Computer Engineering or Equivalent - Candidates have ONE OR MORE good skill sets of the following areas are highly encouraged to apply: - RTL Analysis/Synthesis/STA: The ideal candidate should have strong skills for the front-end of design - implementation which includes RTL Analysis, Synthesis Strategies, and STA setup for complex ASIC - environments. This would include strategies for power management. - OR Physical Design Implementation: The ideal candidate should be strong in the Physical Design (at least at block level) which includes floor planning, design closure, & STA. Having strong DRC & LVS skills are a plus. - Synopsys Astro/ICC experience a plus. Having Mentor Calibre skills a plus. - OR - Physical Verification: The ideal candidate should have in-depth understanding of transistor level IC fabrication process, familiar with major foundries(TSMC or SMIC) runsets and verification flow, custom layout experience is a plus, successfully done LVS/DRC/ERC/Antenna check for multiple tapeouts is a strong plus. Understanding of DFM is a plus. Calibre experience is a plus. - OR - DFT: The ideal candidate should be strong in all DFT (Design for Test) for all aspects. This would include
- scan/TDF, TestKompress, MEMBIST/BISR, JTAG and etc. Having STA skills is a plus for all aspects of test. Responsible for support / debug of customer designs after delivery of prototypes 7.
SerDes Application Engineer (new!!!) JOB DESCRIPTION: Applications engineer for custom silicon integrated circuits with SerDes interfaces located in Shanghai, China. Work as part of a team of highly skilled applications engineers located in Milpitas, CA, and Allentown, PA, along with local field applications and sales engineers. The successful candidate will work directly with the customer supporting custom silicon IC’s with responsibilities including product definition, SerDes integration, channel definition and analysis, system bring up, and production ramp. This individual must be highly motivated and capable of working independently or as part of a team. Expertise in high speed serial interfaces and PCB signal integrity is required. PREFERRED EXPERIENCE: - Oral and written communication skills in both Chinese and English - Microsoft Office Tools including Excel, Powerpoint, and Word - Detailed understanding of serial communications - Knowledge of serial communications standards including XAUI, SRIO, OIF-CEI, IEEE802.3ap, Fibre Channel, SFF-8431 - Knowledge of semiconductor technology - Desired: Use of state of the art test equipment including sampling scopes, BERTs, real time scopes. High speed PCB layout design techniques and modeling Education/Certifications BSEE plus 8 years relevant experience in semiconductors with serial interfaces or MSEE plus 5 years relevant experience in semiconductors with serial interfaces
8.
Preamp Verification Engineer -Shanghai Job Description LSI Corporation is known worldwide as a storage market leader. Our silicon-to-systems solutions empower disk drives with the intelligence, flexibility, speed and reliability needed for high-capacity storage across every market segment, from portable consumer electronics devices to personal computers to enterprise-class storage systems and networks. LSI's Storage Peripherals Division is seeking an experienced verification design engineer to join the pre-amplifier design team. Preamp design team members define, create, modify and verify high-speed custom integrated circuits for hard disk drive (HDD) and tape recording products using leading edge CMOS and BiCMOS technologies - Work with a Preamp Development team to create verilog testbench components and simulation environment. - Create product test plans, test cases and perform simulation and debug of Storage Preamp mixed-signal devices. - Must be experienced with Verilog and Verilog AMS and knowledgeable with functional coverage methodologies. - Ability to follow a disciplined verification methodology and work closely with a multi-location, international design team. - Excellent teamwork and communication skills are required. Requirements/Qualifications (Education) - Preferred degree in Electrical or Electronic Engineering. - BS required, MS or Ph.D. preferred - The ideal candidate will have 5 years of experience as a member of a Design Verification team - Experience with successful tapeout of SoC products from verification plan to sign-off including verification plan, reusable test bench development, random-constrained test case creation, RTL/Gate level simulation/debug, code/functional coverage analysis and regression - Conversant with Verilog, SystemVerilog, Specman, Perl/Python/Tcl scripts, Makefile and EDA tools - Experience with Assertion or Formal Verification a plus - Strong communication skills (must be proficient in both spoken and written English) - Able to travel internationally (to United States and throughout Asia - Understanding of silicon process technologies (CMOS and Bipolar) and device physics would be a plus. - Conversant with Verilog-AMS/Verilog-A and Analog Behavior Modeling would be a plus - Proven analytical skills (application of math and physics to solve problems)
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发表于 2012-1-9 11:28:00
