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[招聘] ~~~急招数字、模拟设计工程师!!!~~~

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发表于 2011-5-21 18:07:42 | 显示全部楼层 |阅读模式

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本帖最后由 samuel_55 于 2012-3-13 23:20 编辑

急招数字、模拟方面的人才~~~~~~

工作地点:苏州

急招有经验的数字、模拟工程师

月薪:10K以上。。提供期权
有意者请将简历发至:samuel_55@sina.com

并请注明数字应聘

Position title: Analog Engineer

Vacancies: 2

Position Responsibilities:

1. Design analog circuits, such as Amplifier, Comparator, ADC/DAC, PLL, CDR, Bandgap, LDO, Filter, Tranceiver, PAD and etc;
2. Use Cadence EDA tool to run simulation;
3. Chip debugging and testing;
4. Design and optimize chip layout.

Position  Requirements:
1. MS degree in ME/EE;
2. Familiar with Cadence design tools for circuit design and simulation;
3. Familiar with the layout drawing tools, layout skills and verification flow;



4. Familiar with ESD, Latch-up and chip reliability design;


5. Familiar with packaging, testing and debugging;

6. Familiar with the semiconductor manufactural process and device knowledge;

7. Familiar with the theory and design methodology of CMOS circuits;

8. At least familiar with one of the following blocks: Amplifier, Comparator, ADC/DAC, PLL, Bandgap, LDO, Filter;

9. 1+ years of analog design experience;

10. Good English reading skills.

Position Title: Digital IC design engineer
Vacancies: 6

Position Responsibilities:

1. RTL level coding according to the requirement from analog/system designer;
2. Develop and execute simulation and lab verification plan;
3. Participate in the FPGA platform development and lab debugging;

4. Synthesize RTL code and Place&Route layout automatically.

Position Requirements:

1. MS degree in EE/CE;
2. Good knowledge of RTL design and simulation;
3. Able to write C code to model RTL blocks for simulation and verification;
4. Able to write reusable Verilog RTL codes, follow design and DFT guidelines;
5. Able to run synthesis, static timing analysis and formal verification is

highly desirable, but not required;
6. Experience in Cadence IC Place&Route Layout tool set;

7. 2+ years of digital design experience;

       8. Good English reading skills.

Position Title: Application engineer

Vacancies: 2

Position Responsibilities:

1. IC verification with FPGA and PCB board;

2. Design and debug PCB board;

3. Deliver reference designs, including hardware, software and documentation;

4. Support customer product development.

Position Requirements:

1. MS degree in EE;

2. Have knowledge and experience in FPGA, PCB design and debug, software development;

3. Good English reading skills.

 楼主| 发表于 2011-5-21 18:08:31 | 显示全部楼层
自己顶一个
 楼主| 发表于 2011-5-23 10:24:56 | 显示全部楼层
顶起来~~~~
发表于 2011-5-23 19:42:53 | 显示全部楼层
请问是哪家公司啊??说来听听看,
 楼主| 发表于 2011-5-24 19:45:16 | 显示全部楼层
顶~~~~~~
 楼主| 发表于 2011-5-30 10:28:18 | 显示全部楼层
 楼主| 发表于 2011-5-31 10:31:40 | 显示全部楼层
 楼主| 发表于 2011-6-2 15:44:03 | 显示全部楼层
 楼主| 发表于 2011-8-21 18:36:38 | 显示全部楼层
顶起来
~~~~~~~~~·
 楼主| 发表于 2011-8-22 10:58:09 | 显示全部楼层
顶!!!!!!!
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