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【诚聘】Analog Custom Layout Engineer

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发表于 2010-12-28 20:04:24 | 显示全部楼层 |阅读模式

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美资公司LSI上海研发中心高薪诚聘通讯存储领域人才,薪水待遇优厚,今年开始配股了,部分人员有出国培训机会。(部门内部推荐,成功机会更高)
有意者请将中英文简历发送至:asic_tapeout@hotmail.com

Analog Custom Layout Engineer

LSI's Storage Peripherals Group is looking for an experienced IC physical design engineer to
join design team. As a physical design (layout) engineer you will work
closely with circuit design to implement high-speed custom analog designs and develop mask
layouts for customer products. You will join a cross-functional team responsible for developing
leading edge high-speed electronic read/write IC products that ultimately achieve
high volume production.

Job Description
High level of physical design experience required. Expertise in full custom analog layout, signal integrity, power and electro-migration analysis, design rule and connectivity verification is required. Familiarity with digital physical design, basic circuit designs, manufacturing and IC packaging is required. Must be technically adept, a strong team player, ability to manage multiple priorities and have excellent interpersonal and communication skills.

Requirements/Qualifications (Education)
- Layout high speed analog and mixed-signal custom chips for the hard disk drive industry
- Work directly with a team of engineers to determine floor plan, routing and I/O
requirements
- Perform IC design rule and connectivity verification and drive products through mask release flows.
- Contribute to methodology improvements to increase layout and verification efficiency.
PREFERRED EXPERIENCE:
- Bachelor's degree in Electrical Engineering (or related field) or equivalent experience
- Minimum 3+ years experience in custom analog IC physical design
- Experience with schematic-driven layout, floor planning, chip level routing, design for
manufacturing and design rule and connectivity verification is required
- Experience using Cadence Virtuoso XL and VCAR router preferred
- Familiarity with both analog and digital layout tools and flows, circuit design concepts and IC manufacturing processes desired.
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