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楼主 |
发表于 2010-4-28 03:10:02
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Benefits:
* High performance HDL simulation solution for FPGA & ASIC design teams
* The best mixed-language environment and performance in the industry.
* Intuitive GUI for efficient interactive or post-simulation debug of RTL and gate-level designs
* Merging, ranking and reporting of code coverage for tracking verification progress
* Sign-off support for popular ASIC libraries
* All ModelSim products are 100% standards based. This means your investment is protected, risk is lowered, reuse is enabled, and productivity is enhanced.
* Award-winning technical support. |
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