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JD:
Take charge of large FPGA design in optics transmission equipment.
To do FPGA design and validation.
Work in IP, Etherner, SDH/SONET area FPGA design.
Implementation of complex FPGA.
Take part in the architecture definition, implementation and verification phases.
Detailed design specification and test plan development. Develop and implement block level RTL, perform synthesis and achieve timing closure.
Standalone module, full chip and system level verification, formal verification and equivalence checking.
Work with cross-functional teams (hardware, software, diagnostics, signal integrity group).
Assist in complex subsystem level bring-up, integration, and unit test verification.
Requirements:
1. Education background:master
2. Major in: communication engineering or computer communication
3. Working experience:more than five years
4. Computer skill: familiarity
5. Language ability:good english spoken language. good on reading and writing english technology documents
6. Other requirements:Has worked in large communication equipment supplier company.
7. Detail Skill Requirement:
l Experience in high performance ASIC/FPGA design from start to finish.
l Good understanding of ASIC/FPGA methodologies and tool flows.
l Working knowledge using HDL languages and tools, scripting and programming languages ( TCL, C and C++).
l Experience with directed-random verification using modelsim, or other code coverage tools.
l Excellent English written and verbal communications, team and people skills.
l Self motivated, ability to work independently with minimal supervision and provide a leadership role.
l Knowledge of Data Networking fundamentals, switches and routers desirable or SDH/SONET Networking fundamentals. |
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eetop公众号
创芯大讲堂
创芯人才网
发表于 2009-11-9 19:53:25
