在线咨询
eetop公众号 创芯大讲堂 创芯人才网
切换到宽版

EETOP 创芯网论坛 (原名:电子顶级开发网)

手机号码,快捷登录

手机号码,快捷登录

找回密码

  登录   注册  

快捷导航
搜帖子
查看: 2763|回复: 2

猎头:数字电路工程师(上海美资)

[复制链接]
发表于 2008-4-3 10:13:50 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

x
数字电路工程师
(需求人数:1名)
项目:PC Clock

职位描述及要求
1
、相关专业本科以上学历,硕士为佳
2、三年以上数字电路设计工作经验
3、熟悉从系统原理,架构设计,电路实现,测试评估的全过程
4、熟悉EDA工具,CAD系统
5、识别系统设计与电路实现之间的关键问题并提出合理解决方案
6、可以独立地,周全细致地完成模块的设计和验证工作
7、基本的英语会话能力,很好的英语阅读、写作能力

有意者发送简历至hzliya@163.com 来信必回
发表于 2008-4-3 14:38:10 | 显示全部楼层
公司是做什么的
 楼主| 发表于 2008-4-25 16:25:15 | 显示全部楼层

other position

Staff product engineer

POSITION SUMMARY:
The Staff Product (IC) Engineer will be responsible to provide new and existing product support, improve product yields, costs and performances in a timely manner.
**Please note that you must have chip/circuit product engineering background, this is not a hardware product engineering position**

RESPONSIBILITIES:
  • Product characterization
  • Product qualification (from board design to test completion)
  • Interface with design engineering, test engineering, foundry engineering, planning QA/FA, manufacturing and Sales & marketing.
  • DFT review

QUALIFICATIONS:
  • Bachelor of Science degree in Electrical Engineering is required. MS degree in Electrical Engineering preferred.
  • At least 5 years of related work experiences required. Must have experiences working in Semiconductor Company (fabless preferred).
  • Required: Hands-on experience with new product releases, product characterization, tester (HP93k preferred) operation, burn-in board design, production qualification, RMA, yield improvement, SOC mixed signal products, foundry interface and FA experience.
  • Preferred: 90 nm product experiences, image processor type products, video products for flat panels and projectors. Working experiences as product engineer of similar type of products.
  • Experiences with SMIC foundry preferred.
  • Strong analytical skills required.
  • Excellent communications skills, written and oral, technical and business skills
  • Willingness to work in teams as well as individually
  • Ability to speak and understand English language desired


ASIC Design Engineer

Responsibility
-
Be responsible for physical design of large, complex CMOS chips. Tasks including floorplan, partition, power routing, place & route, static timing analysis, DRC/LVS and other physical verification.
-
Work with customer design team early in design phase to define good design strategies.
-
Provide feedback and work closely with product development teams to improve design flow.
   -      Coordinate and work with world wide design teams to ensure on time delivery of design results.

Technical requirement
-
Experienced in place & route, static timing analysis, synthesis

-
Extensive knowledge and experience with Magma, or Synopsys place & route tools

-
Extensive knowledge and experience with Synopsys DC,
PT and PTSI tool

   -       Experience with Perl, tcl scripting
-
Solid understanding of deep sub-micron signal integrity issues such a cross-talk, IR drop, etc
-
Capable of handling multiple tasks at one time
   -       Good customer communication skill is a must
  -     Bachelor degree or above in EE major
   -       Minimum 3 year related experience with a solid IC design and EDA tool background
   -       Fluent in speaking and writing


  
您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /1 下一条

小黑屋| 手机版| 关于我们| 联系我们| 在线咨询| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2024-11-16 19:32 , Processed in 0.027313 second(s), 8 queries , Gzip On, Redis On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表