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You can find the info on the website:
In-Design Power Integrity Analysis and Fixing
RedHawk™ Analysis Fusion integration with IC Compiler II™ and Fusion Compiler™ introduces in-design power integrity analysis and fixing capabilities in designers' flows offering signoff accuracy results during the physical design step. Designed to help block-level and top-level engineers converge on their challenging power integrity requirements, the industry’s most used RedHawk signoff engines are leveraged to enable physical designers to analyze and modify their design all within the same environment.
IC Compiler II and Fusion Compiler with RedHawk Analysis Fusion provide an integrated environment created for physical designers to do in-design rail analysis and repair
Includes common analysis features such as connectivity checks and static and dynamic analysis coverage, with and without vector
Leverages automatic in-design rail fixing capabilities including PG augmentation and missing via insertion
Easy-to-learn, easy-to-use
Reduces the pains related to manually translating results from rail analysis and applying fixes in physical design through RedHawk Analysis Fusion automatic setup
Run early-and-often to reduce overall schedule time and iterations
Quickly visualize IR drop maps in the implementation cockpit and do immediate what-if analysis for accelerated debugging
Delivers a complete power flow, compliments your signoff power integrity tool
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eetop公众号
创芯大讲堂
创芯人才网
发表于 2025-4-4 16:21:42
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