Overview Design With SCR-Based Devices in CMOS(IEEE 2005)

semico_ljj

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 5, NO. 2, JUNE 2005

Overview of On-Chip Electrostatic Discharge
Protection Design With SCR-Based Devices in
CMOS Integrated Circuits

Ming-Dou Ker, Senior Member, IEEE, and Kuo-Chun Hsu, Member, IEEE

Abstract—
An overview on the electrostatic discharge (ESD) protection
circuits by using the silicon controlled rectifier (SCR)-based
devices in CMOS ICs is presented. The history and evolution of
SCR device used for on-chip ESD protection is introduced.
Moreover, two practical problems (higher switching voltage and
transient-induced latchup issue) limiting the use of SCR-based
devices in on-chip ESD protection are reported. Some modified
device structures and trigger-assist circuit techniques to reduce
the switching voltage of SCR-based devices are discussed. The
solutions to overcome latchup issue in the SCR-based devices are
also discussed to safely apply the SCR-based devices for on-chip
ESD protection in CMOS IC products.

Index Terms—
Electrostatic discharge (ESD), ESD protection
circuits, latchup, silicon controlled rectifier (SCR).

semico_ljj

CONCLUSION
The ESD protection circuits designed with the various
SCR-based devices in CMOS IC products have been reviewed
and discussed. The SCR device can sustain the highest ESD
robustness within the smallest layout area, as compared with
other non-SCR ESD protection devices. However, the SCR
device generally has a higher switching voltage, which is often
higher than the gate-oxide breakdown voltage in CMOS ICs.
Some trigger-assist techniques had been developed to reduce
the switching voltage and to improve the turn-on speed of
SCR-based devices. Two solutions (by increasing the triggering
current or the holding voltage) to overcome latchup issue had
been developed to safely apply the SCR-based devices in the
ESD protection circuits of CMOS IC products. Besides, the
static latchup issue will vanish certainly when the maximum
power supply voltage of CMOS IC products is smaller than
the holding voltage of SCR devices. In nanoscale CMOS
processes, the SCR-based devices which have low enough
switching voltage and fast enough turn-on speed can effectively
protect the input/output circuits against HBM and MM ESD
stresses. However, SCR application could be somewhat critical
for CDM protection due to a relatively slow trigger speed,
as compared to the transient of CDM ESD event. Therefore,
additional precaution and trigger-assist circuit must be taken
in particular if SCRs are used in the advanced sub-130-nm
technologies for ultrathin gate-oxide protection.

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