招聘！坐标北京——FPGA、ASIC验证工程师

奋斗在SH

长期招聘

工作地址：北京朝阳区望京利泽东街
FPGA验证工程师

Job Objective:
To perform functional verification for FPGA designs
Responsibilities:
1. FPGA simulation and verification strategy planning and architecture design
2. Feature point extraction and test case planning and design and debugging.
3. Documentation for related tasks also is responsible for document review, code inspection and other
tasks required by quality process.
Qualifications & Requirements:
1. More than 1 year working experience on FPGA verification in Telecommunication product field.
2. Good at C/C++ design, good understanding of OOP.
3. Knowledge of SystemVerilog is a must.
4. Knowledge and experience of FPGA design is a plus,
5. Knowledge on verification methodology, OVM,UVM is a plus
6. Be familiar with standard protocol and interfaces and IO standards, PCI, PCI-e, Local bus, SERDES,
CPRI, I2C, SGMII, Flash/SDRAM.
7. Good sense of co-working with team members under CVS/ClearCase like source control environments is
a plus.
8. Linux environment working capable is a plus; knowledge of script/Shell is a plus.

ASIC验证工程师

Job Objective:

To perform functional verification forFPGA designs

Responsibilities:

1. FPGA simulation and verificationstrategy planning and architecture design

2. Feature point extraction and testcase planning and design and debugging.

3. Documentation for related tasks alsois responsible for document review, code inspection and other tasks required byquality process.

Qualifications & Requirements:

1. More than 1 year working experienceon verification

2. Good at C/C++/matlab design, goodunderstanding of OOP.

3. Knowledge of SystemVerilog is a must.

4. Linux environment working capableis amust
5. Knowledge on verificationmethodology, OVM,UVM is a plus
6. Good sense of co-working with teammembers under CVS/ClearCase like source control environments is a plus.
7.knowledge of script/Shell/python/perl is a plus.

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