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1.Kernel Mode Graphics Windows DriverDevelopment Engineer


Level:MTS

Job duties and responsibilities:
• Perform requirements and design engineering; prepare & review systems& software requirements specifications and design descriptions
• Perform software development and test engineering; prepare & reviewdevelopment test plans and test case descriptions
• Provide realistic estimates to specify, design, implement, & developmenttest a proposed feature or enhancement
• Implement portions of a graphics device driver; implement and conductdevelopment test cases related to that implementation
• Resolve problem reports concerning issues with a graphics device driverincluding troubleshooting, debugging, & defect correction
• Communicate with other departments within the company

• Communicate & consult with organizations outside the company
• Coordinate closely with peers & seniors to ensure timely and effectivecommunication of all assigned work activities
• Participate in peer reviews of product and work products
• Manage small projects and feature development

• Deliver results in own area and interdependencies of related areas
• Coach & mentor less experienced staff; influence others as a technicalleader

Work experience requirements:
• Application and/or system software design and programming
• Preparation of specifications and design descriptions
• Use of software debuggers such as WinDbg Design & programming ofoperating system threads in a Win-x86 architecture in both kernel & usermodes

• Graphics driver development and Microsoft DDK

• Programming device drivers under Windows 8 or more modern Windows OSs

• Low-level programming of hardware devices
• Graphics hardware bring-up an asset
• OS Hypervisor an asset
• 64-bit programming an asset
• Related industry experience (5+ yrs)
• Object-oriented design & programming (5+ yrs)
• C/C++ programming (5+ yrs)

2.Job Title: Windows D3D Driver Engineer

DESCRIPTION OF DUTIES:

- Develop and maintain the AMD GPU Graphics Driver
- Work with ASIC design team to tune Graphics Driver performance

PREFERRED EXPERIENCE:

- Master/Ph.D Degree of Computer Science, Mathematics or Electronic Engineering
- 3+ yearss experience of graphics driver development is a plus
- 3+ years experience of C/C++ programming
- Knowledge of Graphics application developing under Microsoft Windows/Linux
- Knowledge of Computer Graphics
- Knowledge of x86 assembler language and x86/x64 CPU instructions
- Knowledge of PC architecture

3.Job Title: Sr or MTS ASIC VerificationEngineer for SMU IP team

AMD System Management Unit(SMU) IP teamdelivers differentiated system management IP for all AMD products. You'll beworking with the global team on complicated clock scheme, security processing,network on chip, power management, etc.

Requirement:

* candidate is preferred to be MSEE with minimum of 5 years, or BSEEwithminimum of 7 years experience indigital ASIC/SOC design verification.

* deep understanding on ASIC/SOC design flow

* Excellent knowledge ofdesign verification methodology, such as VMM or OVM andUVM.
* Solid experiences with simulation model creation and the testbench build
* Strong SystemVerilog experiences.
* Be good at scripting language, such as Perl, Cshell, Ruby, and Makefile.
* C/C++ software development experiences is a plus

It is a must that the candidate has one or more of the followingexperience/knowledge, such as X86/ARM/8051 architecture, AMBA(AXI/AHB/APB)bus,low power design, clock generation and control, Legacy IPs(SPI/SMBUS/ACPI/LPC/GPIO), General connectivity IPs(I2S/I2C/UART), JTAG, etc.

The candidate is expected to exhibit good verbal and written communicationskills in both Chinese and English, specialized knowledge plus broad technicalknowledge that facilitates integrative thinking, driving execution of qualityandtimely result, capability to solve complex, novel and no-recurring problems anddecision-making on critical technical areas.


Responsibility:
* Work with designer to get a full deep insight on the design under test
* Develop stressful testplan

* Build testbench
* Create testcase to ensure maximum coverage

* Develop verification IP which can be reused at different levels ofverfication: block level, sub-system level, SoC level, etc.