智能手机 数字前端经理

jj_seu

智能手机的 数字前端设计经理职位或者engineer 集成电路IC设计/应用工程师 简历发ic@hi-talent.net

职位描述: 1. This candidate should have mobile/high speed interface background and should be interesting in R&D on Video related technologies. 2. IC/IP background. Be interesting in developing and improving New IP. 3. Integration experience, be able to own testchip tapeout. 4. With at least 3-years IP/Product R&D experience. Job Description - RTL coding, new logic design, simulation, synthesis. - Work closely with algorithm engineer to develop/debug new IP/product. Supports FPGA engineer debugging issues on FPGA system. - Work closely with system/SW engineer to verificate/validate new IP/product on FPGA/System platform. - Deliver design/verification/application documents. Qualification and Experience - Very familiar with the Verilog HDL language; - Create the RTL architecture for the algorithm; - Very familiar with C and C++; - Familiar with FPGA tool, ModelSim, and Synplify. - Familiar with the flow of the IC design. Requirements: - Bachelor/Master degree in electronic/computer engineering - Demonstrated abilities in working independently - Strong communication skills