|
|
马上注册，结交更多好友，享用更多功能，让你轻松玩转社区。
您需要 登录 才可以下载或查看，没有账号？注册
x
HDL Works HDL Design Entry EASE v8.0 R3
Most important new functionality in 8.0 is the virtual record. A virtual record is like a VHDL record in that it is a collection of signals, shown as a single signal object. Unlike a VHDL record, the virtual record will be expanded into the individual signals in the generated HDL. The virtual record type can be used as a port on an entity/module and as a port or wire in a diagram. The goal is to decrease the block diagram complexity and increase design flexibility.
On the right is an example of an entity with 83 ports. Using virtual records for groups like ddr2 and ethernet the visible amount of ports is only 32 ports
New functionality:
Virtual records
Search widgets
Property sheets
Signal property dialogs
Process/Generate block dialog
Connect by name dialog
Sticky notes in the browser
Detachable editor window
Linting (DO 254)
PDF printing
Improvements & bug fixes:
Licensing libraries are now based on FlexNet 11.1 and include 64 bits license daemons.
Improved support for VHDL-2008
The Space Key can now be used to rotate selected objects in the diagram editors.
The Del can be used to delete conditions in a FSM.
Alt/Shift Double Click can be used to edit net properties.
The External HDL File Update dialog has a checkbox in the table header to select all files in one action.
Flip command now works on all selected components.
Added instance count to the component tooltip when the count is greater than 1.
Bus rippers can connected to an element of a VHDL or virtual record.
Hierarchy for the top level entity is shown in the HTML documentation.
HTML and PDF documentation can be created with a selected unit as toplevel
Improved text search:
Inside FSM actions and conditions
Inside truth table cells
Inside non-comment included text blocks
Inside (constant and signal) declarations
Replace generic name use in constraint when using component port name to create a new net in an architecture.
Allow range constraint on scalar types like integer and natural.
Default values for ports and nets in property dialogs now use a drop down box containing recently used values.
Do not remove range information in port/generic/net dialog when changing the type.
Multiple Connect-by-name tags can be placed on selected ports by pressing the 'c' accelerator. Using the 'u' accelerator the tags will be of type open.
Multiple Connect-by-name tags (of different type) can now be edited in one dialog.
Tooltip on signals also shows contents of records.
Use connection properties on instance ports during the HDL import to convert more structural HDL into a diagram.
Improved placement of newly created diagram ports when pushing ports up the hierarchy.
Allow start of area selection while inside a block using SHIFT key.
Generic actual values in the component property dialog also shows comment.
Scriptum:
Column selection can be created using the keyboard. Use arrow keys.
Multi-line text insertion
Search and replace within a text selection.
Search dialog will move side ways when it it obscuring a find result.
Option to clone an editor window (Duplicate views)
Keyboard accelerator for exit is now CTRL+Q (was ALT+X)
Changed all keyboard accelerators for dropping bookmarks from <0-9> into <0-9>. This is necessary to recognize the key used for special characters in some languages (e.g. German).
New template mechanism
Available templates are also shown in the type assistant.
Status bar at the right side of the vertical scroll bar, showing you all (parser and linter) messages present for this edit window. Clicking on the status indicator will scroll the context in to the view. The status bar is only shown when Scriptum is part of EASE. |
|
/1 
eetop公众号
创芯大讲堂
创芯人才网
发表于 2013-2-25 14:37:41
楼主
