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[招聘] Cadence 2013 校园招聘-北京RD&PE职位

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发表于 2012-11-23 17:33:10 | 显示全部楼层 |阅读模式

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Cadence  2013 校园招聘-北京RD&PE职位


CadenceNasdaq: CDNS是全球领先的EDA (Electronic Design Automation)
软件开发商以及电子设计自动化解决方案提供商.我们的产品涵盖了电子设计的整个流程,包括系统级设计,功能验证,IC综合及布局布线,模拟、混合信号及射频IC设计,全定制集成电路设计,IC物理验证,PCB设计和硬件仿真建模等。全球知名半导体与电子系统公司均将Cadence软件作为其全球设计的标准。公司网站www.cadence.com.cn


欢迎软件工程、计算机科学、微电子、集成电路、数学等相关专业的2013年及之前毕业的硕士生和博士生投递CVjob_china@cadence.com简历命名:姓名-学校-专业-学历-投递职位名称对职位有任何疑问,也可发邮件至该信箱,我们HR同事会及时给你回复并尽快安排面试。



R&D(preferPh.D)


1. Senior Software Engineer - CharacterizationRD (Location: BJ)

Position Description

The positions are for adeveloper who will be responsible for designing, implementing, and maintaininglibrary characterization and validation software for use with standard cells,memory and macro blocks, and IO cells.

Position Requirements

1.The candidates should havetwo or more years of experiences in developing EDA software.  

2.Must be proficient in C, C++,TCL, and development in Linux/Unix.

3.Knowledge on semiconductordevice is strong plus.

4.Experience with SPICE orSPICE-like circuit simulation is important.   

5.Knowledge of Verilog and VHDLis also highly desirable.   

6.Have a good understanding oflibrary characterization, IP design, static timing analysis, power analysis,and signal integrity analysis flows.

7.Minimum Education Required /Minimum Experience Required : MS, EE, CS, Math or Physics 2

8. Preferred Education /Preferred Experience: Ph.D. , EE, CS, Math or Physics 3-5

2. Senior Software Engineer (Location:BJ)

Position Description

-The position is for analogcircuit simulation engineer responsible for designing, implementing andmaintaining device compact models in SPICE-like circuit simulation software foruse with analog, RF and mixed signal circuit simulators. The engineer will beresponsible for leading multiple development efforts through the developmentprocess, including writing specifications based on marketing and productrequirements, designing and implementing product improvements and fixes, andworking with a cross-functional team to ensure the software is tested,integrated and documented. The engineer must be proficient in C/C++ Unixdevelopment, and have a thorough knowledge of device physics, device compactmodels. The engineer must have a proven ability to learn from and work with anengineering and cross-functional team to deliver innovative products in aproduction environment.


Position Requirements

1.Well devices physics, devicecompact models;

2.Familiar with matrix solver& mathematic calculation;

3.Familiar with Spice, Spectreformat & usage;

4.Skilled in C++ programming,familiar with development under Linux/Unix environment;

5.Be familiar withAnalog-signal design is a plus;

6.Good English communicationskill both verbally and writing;

7.Good problem solving skilland team work spirit;

3. Senior Software Engineer - CadenceVirtuoso Environment (Location: BJ)


Position Description

The Cadence Virtuoso platformpowers all of the latest design innovations in consumer, mobile and enterpriseelectronics worldwide. We are looking for an exceptional senior softwareengineer to join our team and contribute to the continued growth and success ofthe company’s flagship product. In this high-impact career opportunity, youwill lead design and development of cutting-edge features of some of our mostexciting new products, with an emphasis on circuit simulator integration in theVirtuoso ADE/ADE XL environment. You will contribute both individually and as atechnical lead, working with a cross-functional team in Beijing and San Jose toensure that our software is developed, tested, and documented with highquality.

Position Requirements:

1.Exceptional C++ programmingand familiarity with Linux/Unix development.

2.Experience with GUIframeworks, such as Qt.

3.Strong scripting languageskills in one or more of: Python, Perl, Lisp, Tcl.

4.Proficiency with build andversion-control systems.

5.Excellent written and oralEnglish communication skills.

Preferred Skills

6.Coursework or work experiencein electronic circuit design.

7.Exposure to the CadenceVirtuoso environment or other electronic design platforms.

Education

8.B.S. in engineering, computerscience or related field. Graduate degree preferred.

4. Senior Software Engineer,Simulation Integration (Location: BJ)


Position Description

World’s leading designcompanies rely on Cadence technologies to deliver the latest design innovationsin consumer, mobile and enterprise electronics. We are looking for exceptionalsoftware engineers to join our team and contribute to the continued growth andsuccess of the company’s flagship products, such as Virtuoso Spectre andVirtuoso ADE. In this high-impact career opportunity, you will developcutting-edge features of some of our most exciting new products, with anemphasis of scripting language development and GUI integration. You will workwith a cross-functional team in Beijing and San Jose to ensure that oursoftware is developed, tested, and documented with high quality.

Position Requirements:

1.Strong C++ programming andfamiliarity with development under Linux/Unix environment

2.Experience with GUIframeworks, such as Qt.

3.Strong scripting languageskills in one or more of: Python, Perl, Lisp, Tcl

4.Proficiency with build andversion-control systems.

5.Good English communicationskill both verbally and writing.

6.Good problem solving skilland team work spirit.

Preferred Skills

1.Experience in the use ofparser generators, such as Antlr or Yacc/Lex

2.Exposure to circuitsimulators, such as SPICE, HSPICE and Spectre.

3.Coursework or work experiencein analog, RF or mixed-signal circuit design

Education

1.B.S. in engineering, computerscience or related field.

5. Software engineer for Virtuoso ADEXL (Location: BJ)   

Position Description

Custom digital and analogcircuit designers must generate and interpret large amounts of complexsimulation data. Virtuoso ADE XL accelerates design by enabling setup reuse,parallelizing compute-intensive simulation, and through extensivepost-processing and visualization capabilities. We are seeking a talentedsoftware developer to improve simulation throughput and data visualization.


Position Requirements

1.Demonstrated proficiency inC++ and general software development skills

2.BS in Computer Science orComputer Engineering required.

3.XML, SQL, GUI (Qtspecifically), and distributed processing experience a plus.

4.Experience with CadenceVirtuoso or analog circuit design is a plus.

6. Senior Software engineer forVerilog-A simulator development


Position Description:

Develop, enhance and maintainVerilog-A simulator.


Position Requirements:               

1.Familiar with Spice,Verilog-A, Verilog-AMS language

2.Skilled in C++ programming,familiar with development under Linux/Unix environment.

3.Analog circuit or digitalsimulator development experiences.

4.Well understanding on circuitsimulation technology, including MNA, dc, tran method.

5.Good mathematic background& knowledge.

6.Be familiar with AnalogMixed-signal design is a plus

7.EE or CS Master degree withat least 2 years related working experience or above

PE

1. Senior Product Engineer –Characterization (Location: BJ)

Position Description

1.The Altos Product Engineer(PE) works with key customers to understand their library characterizationchallenges, maps

2.Customer needs into productrequirements, and collaborate with the R&D and PV organization to ensurethat the product

3. Implementation addresses thecustomers real needs.

4.The Altos PE plays a pivotalrole in defining and deploying Cadence’s library characterization products andsolutions at key customersthat enables them to do characterization at a veryhigh performance & efficiency.

5.This position requiresproblem discovery and analysis at customer site, assessment of possiblesolutions, collaborating with RD and customer to develop and test the solution,and managing it’s deployment at the customer site.


Position Requirements:

1.The candidate should possessminimum a Bachelors technical degree and 3-5 years of industry experience

2.Minimum 3 years hands-on,expertise on library characterization, IP design, static timing analysis, poweranalysis, and signal integrity analysis flows.

3.Hands on Design experienceusing Verilog, VHDL

4.Experience with SPICE orSPICE-like circuit simulation is strong plus

5. Knowledge on semiconductordevice is strong plus.

6.Knowledge on competitorcharacterization flow and tools is a plus

7.Highly technical & handson engineer with an ability to partner with key customers and provide expertsupport to field application engineers.

8.The candidate must be able todrive R&D and Application engineers and have passion to make customerssuccessful.

9.He/She must be willing totravel worldwide in order to work closely with customers in any part of theworld.

10.Passionate about adoptingand promoting new technologies and making customers successful.

11.Successful in building anddelivering training content on rolling out new products/methodologies

12.Very good communicationskills and a strong desire for working in a global environment with customersDevelopers, marketing and sales.

13.English fluency is a must,Korean speaking language is a plus

发表于 2012-11-23 22:55:07 | 显示全部楼层
下个资料好惨,没有钱。
发表于 2012-11-24 21:20:38 | 显示全部楼层
北京有社招的位置吗?
发表于 2012-11-26 20:15:32 | 显示全部楼层
回复 1# kengteng


   麻烦问下,有没有上海的职位?
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