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Responsibilities:
 Functional Bring-up, verification, validation and debug of any SoC (System On Chip) based FPGA/CPLD
(Field Programmable Gate Array, Complex Programmable Logic Device).
 Interaction and communication with product validation groups globally
 Interfacing with architecture, design, and pre-silicon verification teams in developing, modifying, and
improving tests and set-up
 Lab work involving pre-silicon verification, post-silicon validation and debug
 Develop and debug lab automation and flows to enable rapid validation of new products
 Summarizing product functionality and performance results in a characterization report and reviewing
results with internal groups.
 Evaluation of new products design functionality and performance to the target specification.
 Developing and communicating a characterization plan and schedule.
 Documenting errors when the target specification is not met.
 Partnering with silicon architecture and Design Engineering to ensure device testability.
 Supporting internal and external customers on application issues for products released to production.
Qualifications:
 BS, MS or PhD in Electrical Engineering.
 BS 8+ or MS 6+ years IC Test Engineering in R&D environment, Verification Engineering, Application
Engineering or related semiconductor R&D experiences.
 Strong understanding of SoC architecture and hard IP core.
 2+ years RTL coding and test vector development.
 Strong understanding of AC/DC test methodology and JEDEC standard.
 Lab experiences with high speed equipment, such as oscilloscope and logic analyzer.
 Programming experience with Python, Perl, C, or C++
 Good data analyzing and documentation skill.
 Fluent verbal English.
公司是从事世界上最先进的超大规模可编程逻辑器件及相应的EDA软件系统的研究、设计、开发、生产的专业公司之一,是在系统可编程技术(In System Programmability,简称ISP)及器件的发明者和供应商,是世界上三大可编程逻辑器件供应商之一。
有意者请联系sundy
Tel:
021-60875595
MSN: sy5985@hotmail.com
E-mail:
sundy.song@bestgearconsulting.com |
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