【Design Manager】（上海）-顶级美资芯片公司！

hope17

PREFERRED EXPERIENCE:


1、candidate will have an MSEE,BSEE or equivalent degree,

2、 must have minimum of 7 years of ASIC design/managing experience,

3、 be familiar with Verilog RTL, FPGA, simulation, synthesis, and timing, padring, SOC design experience.  

4、should possess good managing and people skills with proven track record in the ASIC design environment.

5、It is a plus if the candidate has one or more of the following experience/knowledge, such as PCIE, USB, SATA, PCI, Embedded Processor (ARM), or Ethernet.

6、The candidate must exhibit good verbal and written communication skills in both Chinese and English.

7、Hands-on lab experience is a plus; able to understand and/or use the use scopes, logic analyzers, has knowledge or skill of PC system lab debugging.


有兴趣的朋友请发您的简历至：sunshine_0708@live.cn  我会第一时间与您联络！

zhanweisu27

digital??

108272148123

how much every month?