【急招】Staff/ Sr. ASIC Design Verification Engineer _(Display)---上海

doudouha

DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:

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Display IP verification and Display chip verification for various PC products

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Create ,modify and maintain a stable verification environment for Display IP development

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Provide guide for junior DV engineer and whole display design team

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Create and improve test plans or methodology for Display IP test benches suitable for product

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requirements

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Work closely with the ASIC designers on understanding the functional block being

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designed

                                                                                                               
PREFERRED EXPERIENCE:

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Bachelor/Master degree, major in Micro-Electronics(ME) or Electrical Engineering (EE)

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At least 3 years of proven verification experience on large ASIC development projects (7+ years as a bachelor,4+ years as a master)

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Strong background in C/C++

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Experience with Verilog

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Experience working with Cadence NCSIM, Synopsys VCS or equivalent

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Working knowledge of Perl scripting and Makefiles

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Working knowledge of UNIX/Linux operating systems and debugging tools

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Interest in developing custom verification tools and driving new test methodologies

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Strong analytical skills and attention to detail

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Excellent written and communication skills

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Display and Video/Multimedia experience an asset

工作地点：张江高科

薪水面议

有意者请尽快将个人简历发送至carol.ha@usense.com.cn

谢谢~~~

[ 本帖最后由 doudouha 于 2009-3-5 11:40 编辑 ]

semi_yanyu0

ding!!!!!!!!!!