TSMC28nm的DRC错误请教：SR_DOD.DN.1

Jxmatata

SR_DOD.DN.1和SR_DPO.DN.1规则要求在MOS管附近填充SR_DOD和SR_DPO密度＞10%。但我在这个区域已经填满了（如图黄色框内），为什么还报错呢，请问出了什么问题？

/*

SR_DOD.DN.1 { @ Minimum SR_DOD density inside {{{{{{OD OR PO} INTERACT GATE} SIZING 2.5 um} NOT {{OD OR PO} SIZING 0.4 um}} NOT SRM} NOT OD2} (The GATE doesn't include the regions cover by layer VAR, TCDDMY, ICOVL, and CSRDMY) >= 10%
  SRDODx = SRDOD AND CHIP_ODPO_RING
  A = DENSITY SRDODx CHIP_ODPO_RING < SRDOD_DN_1 INSIDE OF LAYER CHIPx PRINT SR_DOD.DN.1.density RDB SR_DOD.DN.1.RDB.density
      [ AREA(SRDODx)/AREA(CHIP_ODPO_RING) ]
  A AND CHIP_ODPO_RING}
*/

                               
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