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超威半导体上海研发中心招聘Physical Design应届生;请有意向者将简历发送到 Cherry.Zhang@amd.com 以及Maggie1.Zhang@amd.com
Job responsibilities:
Implements asic backend design, including floorplan, placement, CTS, routing,
parasitic extraction, STA, Power analysis, Xtalk analysis, physical verification
and etc.
Job Requirement
1. Master of EE or ME, pass CET 6.
2. Basic knowledgeable in deep submicron ASIC design flow.
3. Basic logic/RTL design knowledge.
4. Basic skills in Linux, familiar with programming (TCL, Perl, shell script, C).
5. Experienced with back-end ASIC design and integration flow knowledge is plus.
6. Experienced with common PNR EDA tools flow, ie: ICC/PrimeTime/Calibre is plus.
7. Good communication skills and strong interpersonal skills are plus. |
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