终于把AMS摸透了，过程可怜的，发个总结庆祝一下

abcc123

回复 1# tangyaoyun

     我拷贝了connect_Lib到仿真当前目录，并且设置了DEFINE connectLib ./connect_Lib/connectLib
       在ADE中也选择了ams仿真工具，而且也进行了connect Lib的设置，仿真的时候总是报No connection rule的问题，LZ有遇到过吗
       ncelab: *E,CUVNCM (./ihnl/li/mixsim/schematic/verilog.vams,20|68): No connection module found:Need an input port of continuous discipline electrical, and an output port of discrete discipline logic, at instance mixsim.I6.

cdting

感謝 ~~~

noop

多谢楼主，学习下。

tangyaoyun

回复 21# abcc123

你设置好connet rule 了吗？？

abcc123

回复 24# tangyaoyun
    在ADE的setup->connect rule..选择了User-defined（ncvlog，ncelab，ncsim），add了library，cell，view到list of Connect Rules Used in Simulation，可是仿真的时候还是出现No connect rules found的问题


// 'ConnRules_35V.vams' - Verilog-AMS 3.5 volt connection rules file.
// last revised:  10/22/02 (ronv)
// This file is a template for definition of rules for a particular
// logic family.  Values for some typical parameters are defined here,
// then used in the three sets of connections rules below.
// See the "README.txt" file for a more complete usage description.
`define Vsup  4.5
`define Vthi  1.8
`define Vtlo  0.8
`define Tr    0.2n
`define Rlo   200
`define Rhi   200
`define Rx    40
`define Rz    10M

connectrules ConnRules_35V_mid;
  connect E2L #( .vsup(`Vsup), .vthi(`Vthi), .vtlo(`Vtlo), .tr(`Tr) );
  connect L2E_1 #( .vsup(`Vsup), .tr(`Tr), .rout(`Rlo) );
  connect Bidir_0 #( .vsup(`Vsup), .vthi(`Vthi), .vtlo(`Vtlo),
                   .tr(`Tr), .rout(`Rlo) );
endconnectrules

abcc123

回复 24# tangyaoyun


    加了connect rule还是不行啊，LZ

abcc123

回复 24# tangyaoyun
    在ADE的setup->connect rules加的这个rule，还是不行

    // 'ConnRules_35V.vams' - Verilog-AMS 1.8 volt connection rules file.
// last revised:  10/22/02 (ronv)
// This file is a template for definition of rules for a particular
// logic family.  Values for some typical parameters are defined here,
// then used in the three sets of connections rules below.
// See the "README.txt" file for a more complete usage description.
`define Vsup  4.5
`define Vthi  1.8
`define Vtlo  0.8
`define Tr    0.2n
`define Rlo   200
`define Rhi   200
`define Rx    40
`define Rz    10M

connectrules ConnRules_35V_mid;
  connect E2L #( .vsup(`Vsup), .vthi(`Vthi), .vtlo(`Vtlo), .tr(`Tr) );
  connect L2E_1 #( .vsup(`Vsup), .tr(`Tr), .rout(`Rlo) );
  connect Bidir_0 #( .vsup(`Vsup), .vthi(`Vthi), .vtlo(`Vtlo),
                   .tr(`Tr), .rout(`Rlo) );
endconnectrules

tangyaoyun

回复 27# abcc123

能调用connect rule说明你cds.lib的设置是对的，你调用的是3.5V的rule，你所用的工艺是这个电压吗？？

abcc123

回复 28# tangyaoyun


       工艺是5V的模拟工艺器件，但是整个系统供电采用锂电池，仿真时设置为3.5V

tangyaoyun

回复 26# abcc123

什么问题？