高薪招聘 数字设计验证 模拟设计 layout

d5639011

后端工程师

Requirements:
1. CS/EE or background in areas related to digital or Analog chip design
2. 4 year+ work experience
3. Research and development experience in one or more of the following areas:
- asic back-end design methodology: Knowledge of floor planning, physical design, timing, DFT, signal/power integrity, packaging, synthesis, and other back-end activities
- EDA algorithm, tool, and methodology development.
- Experience/knowledge in analog and mixed-signal IP design, test and evaluation with Bulk CMOS, BiCMOS, SiGe, or SOI technologies
- Proficiency in verilog/Vhdl, and familiarity with programming and scripting languages is a significant plus
4. Experience in one or some of the application domains, will be a plus
- High performance computing (servers) system, processor, chipset and ASICs
- Communication, networking and wireless applications
- Digital signal processing and RISC Processor architecture
- Digital media, audio/video graphic and gaming processing
- Consumer electronics applications
- High Speed Interface/Serdes applications
- Good software background and strong C/C++ skill
- Other emerging technology and industry areas
5. Good English skills, communication skills, and willingness to work with a global team. Skill in other languages will be a plus.
6. Good learning competency and ability to work in diverse areas in a flexible environment

验证工程师

Requirements:

1. ME/EE/CS or background in related areas.

2. Research and/or development experience in one or more of the following areas:

Logic verification on the basis of the target system specification

Mixed-signal model verification on advanced technologies

Proficiency in programming and/or scripting languages is a plus

Knowledge on Protocols, High Speed Serdes or DDR is a plus

3. Experience in one or more of the following application domains, is a plus

High performance computing system, processor, chipset and ASICs

High end communication, networking, mobile
and data center applications

Digital signal processing, sensor and Internet of Things

Other emerging IT technology and industry areas

4. Good English skills, communication skills, and willingness to work with a global team. Skill in other languages is a plus.

5. Good learning competency, self-motivated, and ability to work in diverse areas in a flexible and dynamic environment.

DDR controller/PHY design & verification (staff) Engineer

Job description：

1. Maintain and develop current DDR234/LPDDR234 IP.

2. Deep research on current controller/PHY architecture and micro-architecture.

3. Solve the simulation/integration/timing issue from the customer.

4. Add features on current DDR IP and validate.

5. Make documents – Diagram/table/description using word and visio.

Qualification requirements：

1. Familiar with AXI/DDR(JEDEC)/DFI specification.

2. 3+ years of experience on digital design or verification.

3. Familiar with scripts – Perl and tcl.

4. Familiar with timing concept and SDC.

5. Highly organized and self-motivated.

6.  Ability to work with teammates.

7. Good language and communication skills in English for both spoken and written.

DDRIO circuit (staff) EngineerJob description：1. Work with analog and soc design team for new IP development2. Work closely with layout designer for layout implementation3.  Verification of performance requirements using appropriate simulation and verification tools4.  Support backend and test team for IP release，debugging，failure analysisQualification requirements：1.Familiar with CAD tools，such as virtuoso，hspice 2.3+ years of experience on analog IC design area，familiar with BG，LDO，OPA3. Experience in high speed interface design，such as DDR，LVDS，USB4. Highly organized and self-motivated5. Ability to work with teammates6. Good language and communication skills in English for both spoken and written



Position: DDR FAE/PM

Key responsibilities/duties:

1.
Support customer on DDR IP use and solve issues.

2. Handle DDR relate project process, co-work with IP designer layout designer, backend and operation team.

3. Follow up with customer project process and communication.

Requirements (indicate “must” or “preferred”)

Key skills & knowledge:

1. Familiar with AXI/DDR(JEDEC)/DFI specification

2. 3+ years of experience on digital design or verification

3. Highly organized and self-motivated

4.  Ability to work with teammates

5. Good language and communication skills in English for both spoken and written

Analog Design Engineer

Location: Shanghai, Beijing

Requirements:

1. ME/EE or background in related areas.

2. At least 2 years industry analog design or verification experience.

3. Able to design circuits that operate effectively within the process window, and supervise layout floorplan and design.

4. Demonstrate good knowledge and experience in advanced analog and mixed-signal circuit design, experience in one or more of the following circuits, is a plus:

[size=11.0000pt]· Driver / Receiver

[size=11.0000pt]· Serializer / Deserializer

[size=11.0000pt]· Phase Interpolator

[size=11.0000pt]· VCO, Charge Pump, Clock Divider, PFD

[size=11.0000pt]· Bias, Bandgap, Voltage Regulators

5. Familiar with transistor level circuit EDA tools (Virtuoso, Spectre, HSPICE, etc.).

6. Good understanding of advanced semiconductor technology process and device physics.

7. Experience with system level modeling and simulation by MATLAB, Verilog-A or C/C++ is a plus.

8. Good English skills, communication skills, and willingness to work with a global team. Skill in other languages is a plus.

9. Good learning competency, self-motivated, and ability to work in diverse areas in a flexible and dynamic environment.

简历发：edward-duan@kthr.com 微信:784496295 手机：15221246509

pradeepmadhava1

Helpful for interview preparation thanks