【北京】外企 招聘 FPGA design & verification

morecharm

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FPFPGA Design Consultant Data Communication

Job Title:

FPGA Design Engineer

Job Objective:

To perform FPGA design and maintenance for Telecommunication products

Responsibilities:

FPGA design with Verilog or VHDL.

Perform functional simulation and verification.

FPGA delivery and release, on board debug and testing.

Sustaining/maintenance support for FPGA issues for Voice and Data cards, BTS, BSC and Switching Products.

Documentation for related tasks also is responsible for document review, code inspection and other tasks required by quality process.

Qualifications & Requirements:

Good communication skills in English.

More than 3 years working experience on FPGA design in Telecommunication product field. IP broad band, ATM, data communication related experience.

Good Knowledge on FPGA design process and procedure.

Familiar with Verilog or VHDL, System Verilog is a plus.

Be familiar with standard HW protocol and interfaces and IO standards, PCI, PCI-e, SPI-4, SERDES, I2C, SGMII, and Flash/SDRAM.

Good understanding of IO timing, system/FPGA clocking, and system/FPGA reset structure and strategy.

Good sense of co-working with team members under CVS/ClearCase like source control environments is a plus.

Linux environment working capable is a plus; knowledge of script/Shell is a plus.

2.
FPGA design Consultant Radio design

Job Title:

Senior FPGA Design engineer

Job Objective:

To be responsible for Radio FPGA design, integration and maintenance.

Responsibilities:

Be responsible for Radio FPGA design, including DDC, DUC, RRC filter, CIC filter, sample rating mapping, and all external related interfaces.

Be responsible for related documentation of requirement, architecture, design specification and verification

Be responsible for FPGA design, verification and debugging.

Qualifications & Requirements:

At least three years working experience in digital IF design, graduated from Telecommunication, computing or related majors. Good telecommunication theory background.

Be familiar with digital IF design, be familiar high speed ADC, DAC and other external analog circuits, be familiar with radio structure and design methodology.

Be good at Verilog and VHDL coding and verification.

Be good at digital filter, frequency conversion, extraction, interpolation design, simulation and FPGA implementation

Be familiar with FPGA interface function and logic, high speed SERDES, parallel bus interfaces, serial bus interfaces.

Be good at English, reading, writing, speaking and listening.

Good sense of co-working with team members under CVS/ClearCase like source control environments is a plus.

Linux environment working capable is a plus; knowledge of script/Shell is a plus.

3.
FPGA verification consultant

Job Title:

FPGA Verification Engineer (DV)

Job Objective:

To perform functional verification for FPGA designs

Responsibilities:

FPGA simulation and verification strategy planning and architecture design

Feature point extraction and test case planning and design and debugging.

Documentation for related tasks also is responsible for document review, code inspection and other tasks required by quality process.

Qualifications & Requirements:

More than 1 year working experience on FPGA verification in Telecommunication product field.

Good at C/C++ design, good understanding of OOP.

Knowledge of SystemVerilog is a must.

Knowledge and experience of FPGA design is a plus,

Knowledge on verification methodology, OVM,UVM is a plus

Be familiar with standard protocol and interfaces and IO standards, PCI, PCI-e, Local bus, SERDES, CPRI, I2C, SGMII, Flash/SDRAM.

Good sense of co-working with team members under CVS/ClearCase like source control environments is a plus.

Linux environment working capable is a plus; knowledge of script/Shell is a plus.

1. FPGA/HW Design Intern

Job Title:

FPGA/HW Design Intern

Job Objective:

To perform FPGA design and Hardware test/verification
work for telecommunication products

Responsibility:

To complete module level RTL coding which compliance with the Coding requirements;

To complete the design specification in English for the design;

To understand circuit designs and PCB designs.

To execute and debug lab test cases according to test plan;

Qualifications & Requirements:

Good knowledge and experience on Verilog and/or VHDL;

Good at C/C++ design, good understanding of OOP is a plus;

Good experience in FPGA chips from Altera/Xilinx or Lattice;

Good at using lab equipment, such as oscilloscope, Logical Analyzer, Signal Analyzer, Signal Generator, etc;

Be familiar with standard interfaces, such as I2C, SPI, PCI, SGMII etc.

Good English both in written and oral.

Can work on site for 4 days a week for at least 1 year!

2. FPGA Design Intern

Job Title:

FPGA Design Intern

Job Objective:

To perform FPGA design and maintenance work for telecommunication products

Responsibility:

To complete module level RTL coding which compliance with the Coding requirements;

To complete the design specification in English for the design;

To execute and debug lab test cases according to test plan;

Backend script maintenance and bit/load file generation;

Document / source code maintenance and control.

Qualifications & Requirements:

Good knowledge and experience on Verilog and/or VHDL;

Good at C/C++ design, good understanding of OOP is a plus;

Good experience in FPGA chips from Altera/Xilinx or Lattice;

Be familiar with at least one standard interface, such as I2C, SPI, PCI, SGMII etc.

Development experience on Linux, familiar with Makefile, Scripting like Perl;

Good English both in written and oral.

Can work on site for 4 days a week for at least 1 year!

3. FPGA design functional verification Intern

Job Title:

FPGA Verification Engineer Intern                                   

Job Objective:

to perform functional verification of FPGA/CPLD for wireless communication products

Responsibilities:

Test case development under instruction of experienced engineer

Work closely with FPGA designer to verify RTL design through simulation.

Regression script develop and maintenance

Complete the related document for the job.

Qualifications & Requirements:

C, C++, OOP is a must

Perl, TCL/TK scripting language and makefile knowledge and experience is preferred.

Familiar with SystemVerilog, VHDL is a plus

Knowledge on verification methodology, OVM/UVM is a plus

Familiar with simulation tools such as ModelSim, QuestaSim, etc.

Serious-minded in work

Good at Word, Excel

            Can work on site for 4 days a week for at least 1 year

juliuszwj

这么多关于fpga的岗位，可惜不在上海招。

morecharm

工作地点在北京朝阳区

tunable_ads

which one?

飞扬紫百合

Which Company? Regular or Contractor ??

morecharm

回复 5# 飞扬紫百合


   contract and intern

飞扬紫百合

Maybe for Ericsson

morecharm

急招验证人才啊。。。

IC老兵

Maybe for Ericsson
飞扬紫百合 发表于 2014-9-22 16:34

                               
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ra3d

工作地点在北京朝阳区