AMD招聘集成电路设计及验证工程师

RecruiterAMD

AMD招聘集成电路设计及验证工程师，请感兴趣的工程师把简历发送到maggie1.zhang@amd.com, 并附上应聘理由，非诚勿扰。

Title: Sr./Staff engineer of IC verification

Requirements:

The candidate is preferred to be MSEE with minimum of 3 years, or BSEE with
minimum of 5 years experience in digital ASIC/SOC design verification.
The candidate should have good understanding on ASIC/SOC design flow and should have:

1.
Good knowledge of design verification methodology, such as VMM or OVM.

2.
Many experiences with
simulation model creation and the testbench build

3.
Strong RTL coding with Verilog and familiar with front-end design flow

4.
Strong C/C++ software development experiences

5.
Be familiar with scripting language, such as Perl, C shell, Makefile.

It is a plus if the candidate has one or more of the following experience/knowledge, such as X86/ARM/8051 architecture, AMBA(AXI/AHB/APB) bus, USB(3.0/2.0/1.1; HSIC/host/device/OTG) system, NAND Flash host controller/BCH/double-data-rate interface, PCI-E/PCI bus, low power design, clock generation and control, SD/eMMC host controller, SATA/SAS, Legacy IPs (SPI/SMBUS/ACPI/LPC/GPIO), General connectivity IPs (I2S/I2C/UART), Ethernet, JTAG, etc.

Hands-on lab experience is another plus, able to understand and/or use the use scopes, logic analyzers, has knowledge or skill of board-level lab debugging.

The candidate is expected to exhibit good verbal and written communication skills in both Chinese and English, imaginative thinking and sophisticated analytical techniques, self-driven for quality and timely result, capability
to solve complex problems and makes some modifications to standard methods and decision-making on important technical areas.

Responsibility:

The successful candidate will apply current functional verification techniques to perform and improve pre-silicon verification quality and product Time to Market for ASIC/SOC design.
He/She should be able to work independently on various DV tasks and providing technical guidance to the DV team. The candidate would involve technically in the porting/creation of the DV environment for the new design, block and chip level test plan creation and implementation, coverage analysis, and regression cleanup.

RecruiterAMD

注：工作地点在上海

vepser

回复 2# RecruiterAMD


    AMD的研发工作岗位基本都在上海啊

zzc66

请问还招人么？暑期实习招不招的？谢谢