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OFDM Receiver Design
Yun Chiu, Dejan Markovic, Haiyun Tang, Ning Zhang
{chiuyun, dejan, tangh, [email=ningzh}@eecs.berkeley.edu]ningzh}@eecs.berkeley.edu[/email]
Abstract
Othogonal Frequency Division Multiplex (OFDM) has gained considerable
attention in recent years. It has been adopted for various standards include the 802.11a
wireless LAN standard. In this project, we implemented an OFDM receiver based
802.11a standard. Furthermore, since spatial diversity is the ultimate way to increase
system capacity in bandwidth-cautious wireless applications, the SVD antenna-array
processing algorithm is also implemented and will be integrated with the OFDM receiver.
Key system blocks including Cordic, FFT, Viterbi decoder, and SVD are implemented in
both Simulink and Module Compiler. Simulink simulation of the OFDM receiver is
performed and BER is determined. Total chip area of the OFDM system in 0.25mm
process is 430mm2 and dissipates about 2.6W of power, dominated by the SVD array.OFDM Receiver Design
Yun Chiu, Dejan Markovic, Haiyun Tang, Ning Zhang
{chiuyun, dejan, tangh, [email=ningzh}@eecs.berkeley.edu]ningzh}@eecs.berkeley.edu[/email]
Abstract
Othogonal Frequency Division Multiplex (OFDM) has gained considerable
attention in recent years. It has been adopted for various standards include the 802.11a
wireless LAN standard. In this project, we implemented an OFDM receiver based
802.11a standard. Furthermore, since spatial diversity is the ultimate way to increase
system capacity in bandwidth-cautious wireless applications, the SVD antenna-array
processing algorithm is also implemented and will be integrated with the OFDM receiver.
Key system blocks including Cordic, FFT, Viterbi decoder, and SVD are implemented in
both Simulink and Module Compiler. Simulink simulation of the OFDM receiver is
performed and BER is determined. Total chip area of the OFDM system in 0.25mm
process is 430mm2 and dissipates about 2.6W of power, dominated by the SVD array. |
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