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本帖最后由 s20050430 于 2012-2-9 16:16 编辑
NanoSilicon主要从事数模混合及各种接口芯片IP的设计,包括PLL,LVDS,HDMI,USB(2,3),DisplayPort等,近来发展势头不错,现在北京和南通两地招聘前后端相关职位,感兴趣的朋友可直接发送简历至邮箱或咨询。
网址: www.nanosi.com
邮箱: wade@nanosi.com(北京)
xiaoyang@nanosi.com(南通)
Digital Design/Verification Engineer
Responsibility:
1)Understand functional spec and architecture, and implement design with Verilog.
2)Build testbench, monitors and testcases for DUT.
3)Simulate and debug design from module level to top level.
4)Go through FE design flow(synthesis, timing analysis, formal verification etc).
5)Help and give advice to BE flow.
Requirements:
1)BS or above in Microelectronics-related fields.
2)Proficient on Verilog with good coding style.
3)Familiar with EDA tools like VCS/NC, DC, PT, Formality and etc..
4)Experience with shell/perl/tcl programming in linux.
5)Good communication skills (both written and oral in English and Mandarin).
6)Having FPGA experience, high level verification skills or BE flow knowledge is a plus.
7)Will be a big plus if having HDMI/DisplayPort experience.
Back-End Design Engineer
Responsibility:
1)Take charge of back-end flow from netlist to GDS.
2)IP integration and information extraction.
3)Perform ECO and final check.
Requirements:
1)BS or above in Microelectronics-related fields.
2)Expertise in sub-macro backend design(floorplan, CTS, PnR, DRC and etc.).
3)Experience in synopsys/cadence design tools.
4)Strong timing closing, power optimizing capabilities.
5)Good communication skills (both written and oral in English and Mandarin).
6)Experience in DFT is a plus. |
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