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[资料] Fully Depleted CMOS Technology for Ultralow-power Applications

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发表于 2010-12-25 09:26:27 | 显示全部楼层 |阅读模式

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本帖最后由 helianalog 于 2010-12-25 21:18 编辑

//添加封面--helianalog
Screen shot 2010-12-25 at 9.16.21 PM.png

Fully-Depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications [Paperback]Takayasu Sakurai        
            Takayasu Sakurai          (Author)        
        › Visit Amazon's Takayasu Sakurai Page
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   (Author), Akira Matsuzawa (Author), Takakuni Douseki (Author)

Product Description    Fully-depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications addresses the problem of reducing the supply voltage of conventional circuits for ultralow-power operation and explains power-efficient MTCMOS circuit design for FD-SOI devices at a supply voltage of 0.5 V. The topics include the minimum required knowledge of the fabrication of SOI substrates; FD-SOI devices and the latest developments in device and process technologies; and ultralow-voltage circuits, such as digital circuits, analog/RF circuits, and DC-DC converters. Each ultra-low-power technique related to devices and circuits is fully explained using figures to help understanding.   
  
      About the Author   
Takayasu Sakurai received the Ph.D degree in Electronic Engineering from University of Tokyo, Japan, in 1981 and he joined Toshiba Corporation, where he designed CMOS DRAM, SRAM, BiCMOS ASIC's, RISC's, and multimedia VLSI's. He worked on simple yet accurate interconnect delay, capacitance and MOS models widely used as alpha power-law MOS model. He proposed to sense-amplifying flip-flops, variable threshold voltage CMOS scheme, dual voltage converter scheme, hot carrier resilient circuits and other numerous digital and memory circuits, which are adopted in current high-performance, low-power VLSI's. He was a visiting researcher at University of California, Berkeley from 1988 to 1990. In 1996, he moved to University of Tokyo and is consulting to US startup companies. He has published about 250 technical publications including more than 30 invited papers and 6 books and filed about 100 patents. He is a recipient of four product awards and two design contest awards. He served as a conference chair for the Symposium on VLSI Circuits, and a technical program committee member for ISSCC, CICC, DAC, ICCAD, FPGA workshop, ISLPED, ASPDAC, TAU, and other international conferences. He is a keynote speaker for the 2003 ISSCC. He is an IEEE Fellow, an elected Administration Committee member for the IEEE Solid-State Circuits Society and an IEEE CAS distinguished lecturer.
Product Details  
  • Paperback: 411 pages
  • Publisher: Springer; 1st Edition. edition (October 29, 2010)
  • Language: English
  • ISBN-10: 1441939776
  • ISBN-13: 978-1441939777
Fully Depleted CMOS Technology for Ultralow-power Applications.part1.rar (4.77 MB, 下载次数: 85 )
Fully Depleted CMOS Technology for Ultralow-power Applications.part2.rar (4.77 MB, 下载次数: 86 )
Fully Depleted CMOS Technology for Ultralow-power Applications.part3.rar (374.89 KB, 下载次数: 72 )
发表于 2010-12-25 10:27:23 | 显示全部楼层
It's a nice sharing
Prof. Sakurai is an expert in both low power circuit
and device design
I think this book is an useful material for low power design
Thx.
发表于 2010-12-25 16:13:16 | 显示全部楼层
下来看看,谢谢。
头像被屏蔽
发表于 2010-12-25 16:26:12 | 显示全部楼层
提示: 作者被禁止或删除 内容自动屏蔽
发表于 2010-12-25 20:23:30 | 显示全部楼层
谢谢分享了
发表于 2010-12-27 10:40:28 | 显示全部楼层
回复 1# hslinkstar


   Thanks a lot
发表于 2010-12-29 15:21:52 | 显示全部楼层
谢谢楼主
发表于 2010-12-30 09:06:50 | 显示全部楼层
very good
发表于 2010-12-30 09:37:14 | 显示全部楼层
站上似乎已有..但還是感謝分享
发表于 2011-1-10 18:14:30 | 显示全部楼层
不错! Thanks
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