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A Low-Power, High-Bandwidth LDO Voltage Regulator with No External Capacitor
by Miranda J. Ha
Contents
1 Introduction 7
1.1 Design considerations for voltage regulators 7
1.2 Types of voltage regulators 9
1.2.1 Switching regulators 9
1.2.2 Linear regulators 10
1.2.3 Cascaded regulators 11
1.2.4 LDO regulators 11
1.3 Overview of the state of the art 12
1.4 Goals for this research 13
2 System architecture 15
2.1 Folded cascode 16
2.2 Pass transistor 16
2.3 System gain 17
2.4 Power supply rejection 17
2.5 Biasing 18
3 Design challenges and tradeoffs 20
3.1 Open loop characteristic 20
3.2 Tradeoff between PSRR and bandwidth 20
3.3 Overcoming the PSRR-bandwidth tradeoff 22
3.4 Keeping all transistors in saturation 22
3.5 Tradeoff between PSRR and phase margin 23
3.6 Tradeoff between load capacitance and phase margin 23
4 Measured results 24
4.1 AC open loop gain 24
4.2 PSRR and bandwidth 25
4.3 Graphs 26
4.3.1 PSRR-bandwidth tradeoff and bias current levels 26
4.3.2 PSRR-phase margin tradeoff 27
4.3.3 Load capacitance-phase margin tradeoff 28
4.3.4 Transient behavior 29
4.3.5 Load regulation 31
4.3.6 Output impedance 33
5 Conclusion 35
5.1 Comparison of design to the state of the art 36
5.2 Summary of tradeoffs 37
5.3 Future research 37 |
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发表于 2010-5-3 22:49:35
