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Responsibilities:
As a DFT engineer you will be involved with the complete DFT solution for a design project, you will have responsibilities spanning all aspects of semiconductor design.
Participate in DFT architecture
oSCAN – scan partition, compression, at-speed, IR and low power
oMBIST for memories and LBIST for analog macros such as PLLs and ADCs
oDFT for Analog – Test strategy development in partnership with the analog design team
Implementation
oDevelop appropriate timing constraints for SCAN/MBIST modes and debug timing violations
oATPG flow implementation catering to various fault models, test pattern generation
oSCAN & MBIST Pattern Simulation and full chip validation
oSolutions to test analog macros
Post-Silicon bring-up/support
oWork with Evaluation/Test Engineering team to bring-up patterns on ATE
oWork on failure analysis as required
oWork closely with physical design team throughout the development cycle
(13322936179)
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