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JD如下,公司在上海漕河泾,因为是组建新的团队,对应聘者的要求较高,需要在设计或验证领域能独挡一面,承担leader的角色。合适的应聘者我们会提供你满意的薪资待遇,有意向的请将简历发到jinsong@micron.com
SSD ASIC Senior Design Engineer
Description
As an SSD ASIC Senior Design Engineer at Micron, you will part of a team that develops leading edge System On Chip solutions for Micron. You will be part of a team that is driving innovation into next generation solid state memory controllers and the resulting storage and server products.
Your responsibilities will include, but are not limited to, the following:
o Defining, designing & verifying, modeling, and implementing of controllers for Micron's SSD efforts.
o Developing design specifications, conducting hardware architecture & design tradeoffs, mapping NAND management algorithms into hardware implementations, performing logic design, implementation and block verification.
o Working in close collaboration as part of a team that includes other Digital Designers, Verification and Firmware Engineers, System and Algorithm Engineers, Physical Design Engineers and FPGA Engineers.
Successful candidates for this position will have:
o Experience writing complex RTL code for ASIC based products using Verilog/VHDL.
o Proficiency in Verification techniques, at both a block and system level, to work with the verification engineering team to support excellence in design principles and practice.
o Knowledge and experience performing timing analysis/debug and implementing design improvements.
o Experience in using synthesis, simulation, static timing analysis, power analysis, scan/BIST insertion and formal verification tools in the development of sub-block, block and chip level logic.
o The ability to direct the Physical Integration team with floor-planning and physical partitioning of the design.
o Proven track record of contributing to the development of ASIC based products by assisting with the overall concept, design and optimization of digital and analog ASIC circuits.
o Prior experience in disk controller or storage design. Experience in SATA/SAS/PCIe protocols, NAND, ARM/AXI/AHB, encryption, memory control, error management, power management. (Preferred)
o Strong communication skills, with the ability to convey complex technical concepts to other design peers in verbal and written form.
o A high level of self-motivation and the ability to be a self-starter.
o Experience in designing complex digital hardware systems and developing hardware architectures for algorithm implementation.
o The ability to be a team player, flexible, communicate well and understand what it takes to get the job done.
o Excellent written, verbal and presentation communication skills.
SSD ASIC Senior Verification Engineer
Description
As an SSD senior ASIC Verification Engineer at Micron, you will part of a team that develops leading edge System On Chip solutions for Micron. You will be part of a team that is driving innovation into next generation solid state memory controllers and the resulting storage and server products.
Your responsibilities will include, but are not limited to, the following:
o Defining, designing & verifying, modeling, and implementing of controllers for Micron's SSD efforts.
o Developing design specifications, conducting hardware architecture & design tradeoffs, mapping NAND management algorithms into hardware implementations, performing logic design, implementation and block verification.
o Working in close collaboration as part of a team that includes other Digital Designers, Verification and Firmware Engineers, System and Algorithm Engineers, Physical Design Engineers and FPGA Engineers.
Successful candidates for this position will have:
o Proficiency in advanced Verification techniques, at both a block and system level, to work with the design engineering team to support excellence in design principles and practice.
o Knowledge and experience performing timing analysis/debug and implementing design improvements.
o Experience in developing block and chip level test benches, test plan creation.
o Experience with OVM/UVM, object oriented design principles, Mentor Questasim SV, Power Aware, SVA assertion.
o The ability to work with firmware teams in developing co-simulation environments and system models.
o Proven track record of contributing to the development of ASIC based products by assisting with the overall concept, design and optimization of digital and analog ASIC circuits.
o Prior experience in disk controller or storage design. Experience in SATA/SAS/PCIe protocols, NAND, ARM/AXI/AHB, encryption, memory control, error management, power management. (Preferred)
o Strong communication skills, with the ability to convey complex technical concepts to other design peers in verbal and written form.
o A high level of self-motivation and the ability to be a self-starter.
o Experience in designing complex digital hardware systems and developing hardware architectures for algorithm implementation.
o The ability to be a team player, flexible, communicate well and understand what it takes to get the job done.
o Excellent written, verbal and presentation communication skills. |
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