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1. ASIC Design IP Core H.264 MPEG
职位职能: 高级硬件工程师
职位描述:
Position Description:
The candidate will be the part of the design team for the development of next generation of video codec IP, the responsibilities include:
1.Micro-architecture definition;
2.Logic implementation with Verilog HDL;
3.Block-level verification;
4.Synthesis and pre-layout/post-layout timing closure;
5.Power analysis and reduction;
6.FPGA prototyping and debugging;
Qualification:
7.BS with 5+ years or MS with 2+ years experiences in electronic engineering/micro-electronics;
8.Expect elf-motivation and team player;
9.Solid skills and rich experiences in logic design, synthesis and timing analysis;
10.Hands-on engineering experiences in video codec development, familiar with video coding standard such like H.264/AVC, MPEG-4, AVS etc.;
11.Familiar with all front-end flows including LINT check, simulation, synthesis, STA, formal and power analysis, etc.;
12.Knowledge and experiences in Computer Architecture and RISC processor (ARM/MIPS/SPARC) micro-architecture would be a great plus;
13.Familiar with AXI4/AXI3 protocol, memory controller would be a plus;
14.Experience in FPGA prototyping and debugging would be a plush;
2. IP core 产品经理
产品经理/主管
职位描述:
基本职责:
1. 负责产品的定义和市场推广
2. 负责和工程团队的日常沟通以及和客户的交流工作。
要求:
1. 熟悉IP core领域的产品定义,对该领域的主要公司和产品有深入的了解和研究。
2. 具备一定的市场推广经验。
3. 熟悉多媒体音视频领域(如H.264, H.265的算法、标准及相关概念。
4. 对数字图像处理,数字视频处理有一定的了解。
5. 熟悉IP 设计领域的流程,具备FPGA,芯片设计相关知识。
6. 电子工程,计算机硬件等相关专业,五年以上工作经验。
7. 出色的协调能力和沟通能力,英文流利。
Principal Consultant & General Manager @ Hi-Talent Consulting Co. , Ltd.
上海芯相会企业管理咨询有限公司
E-Mail: bestgraceli@gmail.com
QQ: 2043753191 |
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