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职位描述:
1. Independently handle key IC design tasks:
2. Block level Micro-architecture, RTL Design ,Verification, Synthesis and timing closure.
3. Top level integration, including clock/reset implementation, synthesis and timing closure.
4. FPGA validation and Silicon bring-up.
5. Participating in company`s key engineering initiatives: Methodology improvement, new architecture study and proposal.
6. Coordinating joint development with 3rd party:
7. IP selection/management and vendor coordination
8. Interface with 3rd party vendor for successful execution
- BSEE Degree or equivalent
- Minimum 3 years of experience in hands-on IC design
- Familiarity with ASIC design methodology and SoC architecture.
- Familiarity with standard CAD tools including simulation, synthesis, formal verification tools.
- Self-motivated in solving problems
- Good communication skills and fluent in English.
- Good team player贵司有招聘需求的,欢迎和我联系; 如果你和你朋友有需要看工作机会的,发简历给我HR@Hi-Talent.net Best Regards, Apple Principal Consultant & General Manager @ Hi-Talent Consulting Co.,Ltd. 上海芯相会企业管理咨询有限公司 Mob: 15921265928 Skype: ScarlettJaneJin E-Mail: Jane-Jin@Hi-Talent.net QQ: 983144394 Blog: http://blog.sina.com.cn/u/1716864892 Weibo: http://weibo.com/u/1716864892 Linkedin: jj_seu@hotmail.com |
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