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JOB DESCRIPTION:
- Micro-architecture definition/writing IC design spec.
- RTL coding for logic modules.
- Simulation/Verification of functionalities at both module level and top level.
- Do module level and top level synthesis / timing analysis
- Write complete design/verification reports
- Silicon debug of the related module functionalities
- Write test patterns for production tests
- Write digital design documents.
QUALIFICATION:
- BSEE with minimum 5-year or MSEE with minimum 3-year experience of digital design experience
- Power PMIC design experience is a plus.
- Strong skills of Verilog RTL coding and verification and debug.
- Hands on experience in EDA tools such as Cadence NC-Sim, Synopsys DC, PT, etc.
- Needs to be familiar with I2C both on synchronized and asynchronized designs.
- Self-motivated and team player
KT Human Resources Consulting Company (Shanghai) was established in 2001 in response to a need for a recruitment consultancy to be an active, contributing member of the semiconductor community, as opposed to simply a supplier to it.We provide professional search and talent acquisition in the Integrated Circuit、Electronic、Telecommunications industry of international corporations in Greater China. Our client list contains numerous international companies, many of them are long-term customers.
If you interested in the job, pls sent your cv to: hr@kthr.com, thanks!
“KT人才”微信也可查询职位啦!打开手机微信,搜号码“KTHR_COM”或查找微信公众帐号“KT人才”或扫描以上二维码即可添加,欢迎大家关注!(关注成功后输入”KT“即可查询职位!) |
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