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Cadence SH 招聘Princiapl/LeadProduct Validation Engineer
If you have interest,PLS send your CVto zhangyl@cadence.com
Job Title: Lead PV Design Engineer Jobdescription: 1.
As an Encounter product validationengineer, he/she will contribute to overall Encounter quality/stability andusability, enable designs easier to finish design timing closure and chipfinishing. 2.
Need to run different designs fromplacement/cts/optimization to final SI timing closure, need to look at thosetiming degradations and analysis the reason, whether placement is not good, oroptimization insert unreasonable buffers, or routing pattern is detour, etc.Also need to analysis those max_tran/max_cap/DRC/power issues. 3.
Need to take new designs to add intoregression suite. By given library and RTL netlist, she/he need to createfloorplan, create powerplan, go through APR flow to achieve DRC clean andtiming closure, to get reasonable Performance/Power/Area metric, just liketaping out designs. 4.
Can explore new flows or methodologyto improve timing closure efficiency, and give customer support.
Position requirements: 1. Ph.D or excellent MS which isfamiliar with APR flow. 2. Good at STA. Know about place,routing, cts, optimization and SI analysis is a plus. 3. Know about RTL synthesis 4. Good at unix scripts, cshell. Perlis a plus 5. Strong ability in analysis andsolving issues, strong ability in facing difficulty and challenges. Proactivein work. 6. Good English skill, communication skill and good team work. |