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[招聘] Cadence SH 招数字后端reference flow经理

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发表于 2013-4-16 17:08:53 | 显示全部楼层 |阅读模式

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Position Description:

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Responsible for RTL-to-GDSII digital reference flow development and optimization, for designs from 500MHz to GHz at advance process nodes, for key customer foundries in Asia.

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Provide technical consultant about library qualifications for key customer foundries in Asia.

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Play a leading role among other team members, while receive little instruction on routine and general assignments.


Position Requirements:   

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Bachelor's degree with 8+ years experience or master’s degree with 6+ year’s experiences in IC design.

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Strong ability and hands-on experiences in RTL-to-GDSII design flow and methodology, for designs from 500MHz to several GHz big chips.

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Have real design experience including logic synthesis, P&R, CTS, STA and SSTA, MMMC to close timing, power and die area.

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Working experience in multi-nation IC design house is preferred.

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Good communication in English and Chinese, team-spirit, self-motivated.


简历请投递至cecilyl@cadence.com

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