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Position Description: Ø
Responsible for RTL-to-GDSII digital reference flow development and optimization, for designs from 500MHz to GHz at advance process nodes, for key customer foundries in Asia. Ø
Provide technical consultant about library qualifications for key customer foundries in Asia. Ø
Play a leading role among other team members, while receive little instruction on routine and general assignments.
Position Requirements: Ø
Bachelor's degree with 8+ years experience or master’s degree with 6+ year’s experiences in IC design. Ø
Strong ability and hands-on experiences in RTL-to-GDSII design flow and methodology, for designs from 500MHz to several GHz big chips. Ø
Have real design experience including logic synthesis, P&R, CTS, STA and SSTA, MMMC to close timing, power and die area. Ø
Working experience in multi-nation IC design house is preferred. Ø
Good communication in English and Chinese, team-spirit, self-motivated.
简历请投递至cecilyl@cadence.com |