Cadence SH 招聘 Principal PE and Principal Product Validation Engineer

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CadenceSH 招聘 Principal PE and Principal ProductValidation Engineer

If you have interest, PLS send your update CV to zhangyl@cadence.com

1. PrincipalPVS Product Engineer

PositionDescription:

The Product Engineering team works with Customers andfoundries, R&D, Marketing, and the Field Applications Engineers to createproducts that address the unique and complex needs of our customers. A PhysicalVerification Product Engineer provides in-depth technical expertise in writingPhysical Verification rule decks (i.e. DRC, ERC, FILL and LVS) and the usage ofPhysical Verification tools throughout physical implementation and signoffverification cycles.

Responsibilities:

Develop Physical Verification rule decks (i.e. DRC, ERC,FILL and LVS)

Setup efficient flows to improve rule deck developmentquality and product performance.

Run expert-level benchmarks and solve complex customerproblems.

Work with the RD, field, customers and foundries to identifyand define product requirement and enhancement

PositionRequirements:         

Knowledge of developing rule decks for commercial physicalverification tools (e.g. PVS, Calibre, Hercules, Dracula, Assura, etc.) isrequired.

Experience in the following areas:

- DRC, includes density, antenna, etc.

- LVS, includes device extraction, parameter measurement,connect/stamp sequences, short isolation, etc.

- Knowledge of netlist formats SPICE, CDL, Verilog, etc.

- DFM, includes yield analysis, via insertion, OPC, FILL,etc.

Experience with layout implementation tools (e.g. Virtuoso,DesignREV, ICStation, etc.) for the creation of qualification cells isrequired.

Knowledge of automating test suites for the qualification ofrule decks is a plus.

Programming of Tcl, Perl, and Skill are a plus

EDUCATION: BS or MS in Electrical Engineering.

2. PrincipalProduct Engineer (Location: SH)

Position Description:  

1.This employee will work in shanghai Engagement PE team,mainly focus on TSMC-related project.

2.20nm and 16nm FinFET flow establishment, from synthesis tofinal SI timing closure

3.Work closely with other team members for techniquecommunication and projects. Can take lead role in project plan and action.

4.Co-work closely with R&D team to find the debug thesoftware problem in a IC backend way as early as possible.

PositionRequirements:         

1.Master with 7-8 years working experience or Bachelor withabout 10years experience.

2.IC design background, especially in the back-end flow. LowPower related working experience will be a strong plus.

3.Syntheis, Backend experience, LVS, DRC, CLP knowledge andtape-out experience.

4.Unix System knowledge, vi/TCL/TK/CSH will be plus.

5.Strong scripting capability, including shell/tcl/perl.

6.Good communication in English and Chinese, good confidenceand good self-motivation.

7.Good team spirit, well-aligned with the "One Cadence,One Team."

3.
PrincipalPV Engineer for Hierarchical timing flow (Location:SH)

Position Description:

1.This job is an important addition to Encounter quality and performance

2.Responsible for hierarchical flow timing related validation and mainlyfocus on ILM(Interface Logic Model) related testing

3.Responsible for timing/runtime/memory qualification during flow qualityregular review

4.Continuously to add and tune large scale and advance node designs intovalidation suite

5.Working closely with other team members for technique communication andprojects.

Position Requirements:  

1.BS with minimum 6~7 years and MS with 4~5 years working experiences. EEbackground, from design house or EDA company is strong plus.

2.Be familiar with software development process, debugging tools, andconfiguration management concepts.

3.Excellent knowledge at backend flow in digital design, includingplacement, optimization, cts, route and SI.

4.Excellent knowledge at timing analysis and some physical sense withhierarchical flow should be a plus

5.Excellent ability to learn, explore and strong ability in solvingproblems independently

6.Good team working attitude and innovating spirit.

7.Good Chinese and English communication skills.

4.  Principal PV Engineer for Hierarchicalphysical flow (Location: SH)

PositionDescription:

1.This job is an important addition toEncounter quality and performance

2.Responsible for hierarchical flow physicalrelated validation and mainly focus on prototyping/floorplaning

3.Responsible to co-work with RnD teamclosely to maintain reasonable hierarchical physical flow from testing view

4.Working closely with other team members fortechnique communication and projects.

PositionRequirements:  

1.BS with minimum 6~7 years and MS with 4~5years working experiences. EE background, from design house or EDA company isstrong plus.

2.Be familiar with software developmentprocess, debugging tools, and configuration management concepts.

3.Excellent knowledge at backend flow indigital design, including prototyping, floorPlan, placement, routing, etc.

4.Some deep physical sense with hierarchicalflow will be a plus

5.Excellent ability to learn, explore andstrong ability in solving problems independently

6.Good team working attitude and innovatingspirit.

7.Good Chinese and English communicationskills.