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Job Description – SoC ASIC Verification Engineer(3年以上经验就OK,技术第一)
Responsibilities: Instrumental in the development of infrastructure for the validation of ARM AMBA-based architectures and the verification of SoC hardware. Additional duties include the development of directed and random hardware verification environments, and the application of those environments to SOC verification Integration of VIP UVC and functional verification agents in OVM verification environment to support coverage-driven verification Qualification: Extensive Verilog experience with SOC verification environments. Verification experience on ARM, AXI, and DMA with VIP UVC Experience developing bus functional models, monitors, scoreboards, generators, functional coverage models Experience with high level verification languages such as SystemC, SystemVerilog, OVM or VMM, Vera or Specman, and strong C++ programming background Shell scripts and Tcl/Perl expertise, create runsim, lsf, regression management scripts Able to understand Verilog RTL code, debug simulation errors, identify and fix RTL/Environment issues Strong DSP background is highly desirable Experience of design/verification for analog video decoder of video surveillance products is a big plus 有兴趣+Q:1014565282,或者CV发生1014565282@QQ.COM |