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需要信号完整性仿真经验,工作经验5年+
JOB DESCRIPTION:
Design rule development and implementation of in-house packaging layout to meet product requirements.
EDA tool set up and flow development.
PI/SI analysis on full chip and critical IPs at package level.
Define and develop package solution for high speed, high power and large pin count device in a cross-function team
Interface with vendors on process optimization, chip characterization and failure analysis for volume production
Drive new technology development such as multi-die, advanced substrate, design for manufacturability and design for reliability, as a collaborative effort with vendors.
QUALIFICATIONS:
Education: Bachelor Degree or above, Master is preferred. Major in microelectronics, material etc.
Hands on experiences with layout of FCBGA, MCM, SiP, WLBGA etc and optimization for ball count and power grid.
Experience on design of very large form factor flip chip package with high substrate layer count
Experience with high-speed IO interfaces design and bringup such as DDR and PCIe is preferred.
Experience on PI/SI analysis is a must.
Experience on mechanical and thermal analysis and control, knowledge on mechanical and thermal reliability is a plus.
Capability of driving package roadmap to meet future products on advanced nodes.
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