In this design, the biasing of the output stage is kept separate from the biasing of the input stage. By doing this, it is important to be aware of the slew-rate behavior of the opamp. Because the currents of the current sources I1 and I2 are chosen smaller than the tail current source Itail, the slewing characteristic is different for positive and negative slopes of the input signal. The maximum slew current available for charging the gates of the output transistors is larger than the current which is available for discharging the gates of the output transistors. The charge current will be delivered by the input stage, and so by the tail current source Itail. The discharge current will be delivered by the current sources I1 and I2. It is also possible to combine the biasing of the input and output stages by using the bias currents through input stage transistors M6, M8 and M4, M10 for biasing the class-AB control transistors M13 and M14, and eliminating the current sources I1 and I2 in the output stage. The reason why the biasing is kept separate is that it gives the designer an extra degree of freedom when adopting the opamp for various applications and loads. Also, extra circuitry will be necessary to prevent the quiescent current of the opamp from becoming dependent on the common-mode input voltage [3].
以上是论文的原话，论文全名是《A 90-dB THD Rail-to-Rail Input Opamp Using a New Local Charge Pump in CMOS》 ( , 下载次数:
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