Responsibility: (1)Participate IP and SoC level architecture definition, derive functional and design specifications and analyze feasibility of technical and architectures.
(2) Implement design with Verilog to achieve specification goals. Simulate and debug the codes in coding stage. Go through the FE design flow to deliver qualified netlist. Feedback to Physical Design team to help to close timing and check floorplan
(3) Write ASIC specific part of test plan. Prove functional correctness from block level to SoC level
(4) Support FW/SW bring-up and debugging
(5) Working as the technical point of contact on the ASIC area.
(6) Maintain design environment, solve flow issues, and develop scripts to improve flow efficiency. requirments: (1)Major in EE & CS
(2)RTL, Verification, Testbench, SystemC, SystemVerilog, OVM
(3)Must be proficient in Verilog coding, debugging and modeling
(4)Should be familiar with Advanced C/C++/SystemVerilog, RTL coding techniques.
(5)Should be familiar with ASIC design flow, such as synthesis, DFT, timing analysis, ECO etc.
(6)Must be familiar with shell/perl/tcl programming in linux OS.
(7)Should have strong problem solving skills
(8)Good English hearing, speaking, reading and writing capabilities.
(9)Good communication skills
junior/Sr. ASIC Design Verification Engineer
Responsibility:
- Understand the architecture of the chip and functional block being designed
- Build C/C++ model for simulation
- Build test bench and monitors for DUT
- Compose test plan and validation vectors to ensure functional completeness
- Debug function/performance bugs of graphics chips requirments:
- Major in EE, CS or related, Master Degree with 1+ years or Bachelor with 3+ years working experiences
- Familiar with Linux Environment (including shell scripting and linux gnu tools)
- Proficient on Verilog and asic design flow
- Familiar with Perl or other script language,makefile
- Familiar with C/C++
- Should be familiar with in any one of the high level verification flow such as SV,VMM,VERA,OVM etc as well as knowledge of industry standard tools for verification
- Should have excellent communication skills (both written and oral)
- Strong problem solving skills
- Will be a big plus if having mass production tape-out experience
Sr. Application Engineer
Responsibility:
- The candidate works with internal teams and ODM/OEM technical teams to debug and resolve customer reported technical issues found in customer designs using AMD platform or mobile graphic products.
- Provide hardware and software technical guidance and information to AMD's customers to support of their PC platform or mobile graphics design projects;
- Perform PC schematic and PCB layout reviews
- Respond to ODM/OEM requests for on-site support requirments:
- A Bachelor's and /or Master's degree in Electrical/Electronics Engineering, Computer Engineering, or equivalent.
- 3+ years HW design and debug experience in Motherboard, notebook, or graphic card.
- Knowledge of motherboard,notebook and graphic design flow, product development processes, reliability verification, validation and compatibility testing.
- Proficient English and Mandarin (listening, writing and speaking).
- A self-motivated individual who can work well with internal and external engineering experts to develop practical solutions timely to challenging technical problems
- Experience in Firmware BIOS/ Operating Systems (Windows, DOS, Linux) / Display driver interaction is a plus
- Know how to use Agilent or Tektronix machine for PCIE, HDMI and Display Port testing and debug is a plus
- Willingness to travel if required
Sr/MTS. physical design Engineer:
requirments: 1. master with 3+ years of industrial experience or BC with 6+ years of industrial experience in ASIC design
2. 3 years or more years of experience in physical design of deep submicron digital ASIC chips
3. Hands on experience in large scale ASIC chip physical design
4. Knowledgeable in all aspects of deep submicron ASIC design flow
5. Successfully gone through several complete product development cycles
6. Demonstrate leadership and work well with cross-functional teams
7. Good listening, writing and speaking English
8. Good communication skills, strong interpersonal skills and the flexibility
9. Dedicated, hard working and good team player
10. Familiar with Back-End (physical design) EDA tools
11. Familiar with Front-End EDA tools is a plus
12. Familiar with Unix/Linux environment and good at scripts
Linux driver Engineer：
DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
- Design, code, optimize and maintain AMD Linux graphics display driver
- AMD new graphics ASIC bring up under Linux
requirments:
- Mater degree or above in C.S. or E.E.
- Good knowledge of C/C++ programming
- Good knowledge of Linux kernel programming
- Good knowledge of graphics is a plus
- Good written and verbal communication skills
- 3+ years experience in C/C++ programming
- 3+ years experience in Linux kernel development and debugging
- 3+ years experience in Linux device driver development and debugging
- Experience in graphics driver development is a plus
- Experience in XServer/X.Org development is a plus
- Fluent English language communication skills (including verbal/writing/reading), and CET-6 pass is a minimum
Sr. & MTS board design Engineer：
Responsibility:
1. Participates in discussions with Customers, Field Applications, Sales and Marketing to determine what hardware products are necessary to support and complement new silicon products.
2. Develops and reviews comprehensive specifications for board-level and system-level products, based on a clear understanding of the function to be demonstrated across design, testing, and use of the product
3. Designs board level products to meet the requirements of the project to agreed schedule, quality and cost requirements across the whole development lifecycle. Support outside manufacture venders.
4. Focus on the electronic circuit design, test and debugging for the microprocessor based products such as PC desktop, mobile and server system.
5. Responsible for board/system level development including schematics design, components selection, system bring-up, tuning, and functional validation and debugging.
6. Develops FPGA firmware to support new board-level designs.
7. Feedback and refine design rules with simulation and silicon design teams
8. Negotiate solid solutions to technical issues and design challenges
9. Ensure all processes are met in development
10. Provides guidance for less experienced engineers
11. Writes and reviews detailed technical documentation.
12. Provides design assistance to Customers, Field Applications, and Sales.
13. Supports resolution of customer problems which require system-level expertise. reqrequirments: 1. 3+ years experience in PC desktop, mobile or server system development or sustaining.
2. Strong hardware design skills as measured by successful delivery of digital designs.
3. Knowledge of design flow, product development processes, reliability verification, validation and compatibility testing.
4. Experience in Microprocessor based motherboard designs in the PC Desktop, Mobile and Server markets.
5. Familiar with PC, mobile or server architecture.
6. Familiar with CAD Tools, including but not limited to OrCAD, Allegro, and Concept HDL.
7. Familiar with Verilog, FPGA program and debug.
8. Proficient with the Windows Operating System.
9. Basic understanding of UNIX/Linux, software languages, and HDL sufficient to help debug system problems
10. Bachelor or above degree in an Engineering or Science area.
11. Ability to clearly communicate technical ideas across disciplines.
12. Proficient English and Mandarin (listening, writing and speaking).
13. Strong passion for achievement and career development.
Sr. & MTS Design Engineer - DFT： Responsibility: 1. Participate in SOC full Chip DFT feature and architecture definition
2. Responsible for DFT specification generation and review
3. Implement SOC DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic.
4. Perform verification on all DFT structures
5. Generate DFT related timing constraints and work with PD team for timing closure
6. Generate and verify DFT structural patterns and functional patterns
7. Participate in ATE bring-up and debug the DFT patterns on ATE
8. Design and implement other DFX (debug, characterization, yield etc) logics reqrequirments:
- BS in EE & CS. MS preferred.
- Hands on working experience on ASIC DFT design and verification
- Familiar with entire ASIC design flow
- Experience with micro processor design a big plus
- Should have strong problem solving skills
- Good English hearing, speaking, reading and writing capabilities
- Good communication skills作者: light_lai 时间: 2011-6-24 10:36
LZ,简历已经发到你的邮箱，有消息请给我回信。谢了啊作者: darkdolls 时间: 2011-6-25 10:10
MARK...顺便问一句：在哪儿啊作者: fangyuyuan6666 时间: 2011-6-25 13:57
现在招聘的职位主要是上海研发中心。
北京研发中心年底或者明年会成立，到时候北京那边也会有比较多的职位了。作者: aimar327 时间: 2011-6-25 21:34
北研主要是什么方向呢？作者: fangyuyuan6666 时间: 2011-6-26 23:12 回复 5#aimar327
