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We're hiring!! If you have interest , send email to vicky.cai@amd.com. We're waiting for you!
AMD Image Signal Processor (ISP) team has immediate openingof MTS asic design engineer. The successful candidate would be hired in asstaff engineer level, with the expectation that they would have minimal 3-5years of RTL design experience in the multimedia, image processing or similarindustry. A candidate that has a strong image science background with a focuson image signal processing (ISP) is highly desirable.
PREFERRED EXPERIENCE: ·
BS-CS/BS-EE with at least7 years' experience or MS with at least 5 years' experience in ASIC/SoC design ·
Familiar with C/C++programming and unix/linux and scripts (tcl, perl etc.) ·
Familiar with front-endEDA tools and flows. ·
Strongmultimedia/video/camera related system level knowledge and experience ·
Strong individual analysis,problem solving skills and teamwork attitude ·
Will be a plus if havinglow power design, debugging and modeling experience ·
Will be a plus if havingFPGA validation experience ·
Experience of workingwith multi-site teams is preferred
KEY RESPONSIBILITY: ·
Participate in ISP hardwarearchitecture definition, responsible for ISP block level macro architecture ·
Design and implement ISPpipeline and blocks based on IP architecture and algorithm specification
·
Closely interact withalgorithm, verification and firmware team in new feature definition, deliverdesign specification and program guide
·
Work with verification teamand firmware team to complete ISP pipeline pre silicon and post siliconvalidation ·
Maintain design environment, solveflow issues, and develop scripts to improve flow efficiency
·
Collaborate and interfacewith local and global management to make accountable deliverables on time |