【招聘VeriSilicon】工具开发/视频编码等工程师

evita2011

公司简介及所获奖项：
芯原股份有限公司成立于2001年，总部位于中国上海和世界各地设有办事处。目前在全球已有超过600名员工。是一家芯片设计平台即服务提供商，为包含移动互联设备、数据中心、物联网（IOT）、可穿戴设备、智能家居和汽车电子等多种终端市场在内的各种广泛应用提供以IP为中心的、基于平台的芯片定制服务和一站式端到端的半导体设计服务。公司网址：www.verisilicon.com  
•        连续五年入围德勤中国高科技、高成长50强 (Deloitte Technology Fast 50 China)
•        连续八年入围德勤亚太区高科技高成长500强 (Deloitte Technology Fast 500 Asia Pacific)
•        连续三年被提名为“清科-中国最具投资价值50强公司”
•        曾荣获 Red Herring 亚洲尚未上市企业100强企业 (Red Herring‘s 100 Private Companies of Asia) 称号
•        曾入选 EE Times 全球60家最具潜力半导体初创公司 (EE Times 60 Emerging Startups)

公司福利（包括但不限于）：
员工生日会 / 父亲节礼品 / 免费早餐 / 交通补助 / 午餐补助 / 年度体检 / 年会活动 / 带薪假期
下午茶小吃 / 母亲节礼品 / 面包西点 / 专利奖金 / 五险一金 / 健身活动 / 补充医疗 / 节日礼品
端午节礼品 / 妇女节礼品 / 员工奖励 / 高质团建 …

加入芯原你将拥有：
给力的薪酬 & 舒适的办公环境 & 简单和谐的工作伙伴 & 各种高品质福利待遇
以下职位请发送简历至（★请注明应聘职位及工作地点）：evita.han@foxmail.com   


一、Application Engineer应用工程师（工作地点：北京-中关村软件园）
Responsibilities职位描述:
1.        为SoC设计服务中包括前段，后端，以及生产和测试在内的所有流程提供专业化的一线技术支持；
Provide front-line support for the professional SoC design service in terms of frontend, backend, manufacture, as well as packaging and testing.
2.        评估具体项目中IPs(数字和混合信号IP)的可实施性，并基于客户化的需求，开发设计具体的应用系统；Evaluate the feasibility of IPs (digital and mixed-signal included) on target project and develop the specific application based on the customized requirements.
3.        协助销售伙伴预估市场未来走向，并定位和发掘高质量的潜在客户；
Assist with sales partner to estimate the trend of market and orientate & explore the high-quality potential customers.
4.        配合内部的相关团队（工程，运营，财务等部门）顺畅项目流程进展，并及时解决流程中随时出现的问题。
Collaborate with relevant internal teams (Engineering, Operation, Finance, etc.) to streamline the proceeding process and resolve emerging issues in the timely manners.

Requirements应聘要求：
1. 电子技术及通信相关专业硕士学历（本科学历需有5年及以上相关工作经验）；
Masters Degree in Electronics Engineering or Communications Engineering (Bachelors Degree considered if supported by 5+ years experience);
2.  5年以上RTL和asic / Soc相关设计经验，并具备良好的前端或后端的设计知识；
5+ years experience of RTL and ASIC / SoC design and be equip with good knowledge of frontend or backend design.
3. 具有基于MCU / dsp的通信或消费类芯片开发的工作经验者优先考虑；
Post-graduate experience of communications or consumer chip system development based on MCU / DSP is preferred.
4. 有嵌入式软件开发经验者非必要条件，但优先考虑；
Experience of embedded software development not essential but a definite advantage;
5. 具有支持客户相关经验者优先考虑；
Experience in a customer-facing role preferred.
6. 中英文读写顺畅。
Good verbal and written communication in English and Mandarin essential;
二、工具开发工程师Tool Development Engineer（工作地点：成都天府软件园-可解决成都户口）
工作描述：
- 视觉图像处理与神经网络相关软件的开发与维护
- DSP处理器开发工具的开发与维护
- 自动化测试工具的开发与维护
职位要求：
- 计算机科学与工程学士或硕士学历
- 熟练掌握C/C++ & Java编程
- 具有Windows和Linux环境下的工作经验
- 具有Eclipse 富客户平台开发经验者优先
- 具有OpenCL/OpenVX代码开 发经验者优先
- 熟 悉CNN模型者优先
- 拥有良好的团队合作精神
- 拥有良好的英语读写技能

三、Product Engineer of VPU （北京/成都）
Responsibilities:
-Develop expert level understanding of video codec IP product offerings, including capabilities, competitiveness, and the applications
-Define new feature or product specification based on in-depth understanding of our Video codec IPs and customer requirements
-Engage with customer in technical evaluation, provide respond to technical requests or questions, and managingthe engagement
-Maintain good customer relationship, support and resolve their issues, identify needs and new opportunities
-Perform technical training, presentation, and demo to customers, sales, and engineers
Requirements:
-Working experience in one of the fields in graphics, video, multi-media, image processing or computer vision
-Familiar with the ASIC design flow (including specification, architecture, and design implementation)
-Skillful in analysis, generate ideas, and provide solutions to solve technical problems
-Self-motivated, team work, and good communication skills in English

四、Video Codec Algorithm Engineer 视频编码算法工程师Responsibility （北京/成都）
Responsibilities / 工作职责 :
-Video codec algorithm research and optimization / 视频编解码的算法研究和优化；
-C-Model design and realization / C-Model设计和实现；
-Develop and test the video codec control software / 视频编解码器控制软件的开发，调测；
- Assistant the hardware engineers to optimize the performance of hardware modules and area /帮助硬件工程师优化硬件模块的性能和面积；
-Help hardware and system engineers for system verification to solve the related technical issues /  帮助硬件和系统工程师进行系统验证，并解决相关问题;
- Resolve customer multimedia system software problems on Android or Linux OS, that use company’s video codec IP /处理用户在使用公司视频编解码IP相关系统软件问题。
Requirements / 要求：
- Over 5-years of related working experience in video codec algorithm research fields, or video multimedia software / 5年以上相关工作经验;
- MS/PHD/in EE /CS or related IT technology fields /计算机、电子工程专业或相关技术领域硕士及以上学历；
-Skilled in the field of digital video codec, special on H.264 or H.265, expert in C/C++ design, better on embedded software field , familiar with Linux or Android multimedia frame work, OMX or Y4L2.      
熟练掌握数字视频编解码原理，规范结构，特别在h.264或h.265；在C/C++设计方面和嵌入式软件领域有丰富经验者优先; 了解或者熟悉Android /Linux多媒体框架和插件;
- Some knowledge on hardware design and optimization is better / 有硬件设计开发及优化工作经验者优先；
- Good Mandarin and English communication skills /  优秀的中英文沟通能力
- Good team work and passion in high pressure /良好的团队合作精神，能承受较大工作压力。

五、Sr. Engineer/Staff Engineer of VPU Verification（成都）
Responsibilities:
-Understanding the expected functionality of designs.
-Develop environments for complex system functional verification.
-Write verification plans for system level IPs and systems.
-Contribute improvements to verification methodologies, and toolsets.
Requirements:
-Minimum of 3 years design/verification experience (test plan, test bench, assertions, debugging designs, code coverage etc.)
-Knowledge in ASIC/FPGA design flow and verification tools/environment (UVM/OVM…).
-Familiar with design and verification languages (verilog/System Verilog/SVA etc.).
-Familiar with at least 1 scripting language in Perl/Python/Cshell/Bash/Makefile etc.
-Familiar with C/C++ is a plus.
-Knowledge of H.264/HEVC/VP9/JPEG/MPEG or other video/image compression format is a plus.
-Knowledge of AXI/ AHB/ APB/OCP and other bus protocol is a plus.
-Experience in video subsystem verification is a plus.

六、Project Leader/Manager of VPU Verification（成都）
Responsibilities:
-Understanding the expected functionality of designs.
-Develop environments for complex system functional verification.
-Write verification plans for system level IPs and systems.
-Contribute improvements to verification methodologies, and toolsets.
-Mange and guide team members
Requirements:
-Minimum of 5 years design/verification experience (test plan, test bench, assertions, debugging designs, code coverage etc.)
-Good communication skills
-Knowledge in ASIC/FPGA design flow and verification tools/environment (UVM/OVM…).
-Rich knowledge in design and verification languages (Verilog/System Verilog/SVA etc.).
-Familiar with at least 2 scripting language in Perl/Python/Cshell/Bash/Makefile etc.
-Familiar with AXI/ AHB/ APB/OCP and other bus protocol.
-Familiar with C/C++.
-Knowledge of H.264/HEVC/VP9/JPEG/MPEG or other video/image compression format is a plus.
-Experience in video subsystem verification is a plus.
-Experience of leading a team/sub team is a plus

七、Multimedia video codec SW team leader（北京/成都）
Responsibility:
-Video codec control SW arch design for different multimedia framework.
-Develop key modules in video codec control SW.
-Manage projects development resource/schedule.
-Monitor engineers’ daily jobs, help them resolve some issues.
-Debug/fix the critical issues in projects or reported by customers.
Requirements:
-Over 7-years of related working experience in video codec multimedia software.
-Good to have team leader/manager experience.
-MS, PHD in SE, CS, EE or related IT technology fields.
-Familiar with Android/Linux multimedia frame work, Stagefright, Gstreamer, FFMPEG, OMXIL/Codec2.0 or V4L2; expert in C/C++ design, better on embedded software field.
-Some knowledge on Linux kernel development.
-Some knowledge on video formats stream syntax, or video stream file container.
-Good Mandarin and English communication skills;
-Good team work and passion in high pressure.

以上职位请发送简历至（★请注明应聘职位及工作地点）：evita.han@foxmail.com