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本帖最后由 NVHR 于 2018-3-6 21:43 编辑
工作地点：上海市浦东新区秋月路26号 投递邮箱：heatherl@nvidia.com
高级芯片设计工程师（安全方向）Senior asic Design Engineer (Security)
工作职责：
- Building NVIDIA's next generationof RISCV security cpu
- Co-work with architect team todefine CPU architecture/micro-architecture
- Design and verification of varioushardware modules including CPU core, interconnect, and various peripheralsincluding DMA, AES, SHA, RSA and ECC engines
任职资格：
- BS/MS in electrical/computerengineering and related.
- 3+ years’ experience in ASICdesign. Strong design/implementation skills in verilog. Solid understanding intiming/power optimization skills of digital design
加分项：
- Solid understanding to computerarchitecture
- Project experiences of complex CPUarchitecture or micro-architecture design like out-of-order or dual-issue cores
- Knowledge or project experiencesof RISCV CPU
- Broad understanding to computersecurity and crypro algorithms like AES/SHA/RSA/ECC
- Perl scripting skills isappreciated as a plus.
- Fluent English (both written andspoken) and excellent communication skills
- Demonstrated ability to workindependently as well as in a multi-disciplinary group environment
高级芯片设计工程师（视频方向）Senior ASIC Design Engineer (Video)
工作职责：
- Building NVIDIA's next generationof video codec engines
- Co-work with video architect todefine video architecture/micro-architecture
- Design and verification of videohardware module.
任职资格：
- BS/MS in electrical/computerengineering and related.
- 3+ years ‘experience in ASIC design.Strong design/implementation skills in Verilog. Solid understanding intiming/power optimization skills of digital design
加分项：
- Broad knowledge with video andimage processing techniques and with digital video compression standards suchas H.264, H265, VP9 and AV1 is a big plus.
- Knowledge with computer visionalgorithms like optical flow and stereo is a plus.
- Familiar with HLS tool, likeMentor Catapult
- Perl scripting skills isappreciated as a plus.
- Fluent English (both written andspoken) and excellent communication skills
- Demonstrated ability to workindependently as well as in a multi-disciplinary group environment
高级芯片验证工程师Senior Verification Engineer
工作职责：
- You will participate in theresearch of verification methodology to improve automation and productivity toproduce Nvidia’s new high-quality state of the art products.
- Read IAS and design specs tounderstand the design requirement and build corresponding testplan. Review thetestplan with arch/design engineers.
- You responses to build block/IP testbenchbased on UVM methodology.
- The responsibilities includesbuilding test run and regression flow. Triage failures in regression and helpdesigner root cause the bug.
- Work includes Build variousmetrics (passing rate, functional coverage, etc) and monitor its health.
- Take SOC verification on fullchiptest environment for IPs
- Analyse functional/code coverageresult and identify the coverage holes. Work with design engineer to improvethe coverage score.
- Deploy the advanced verificationmethodology and infrastructure of the SOC/IP
任职资格：
- BS / MS in electrical / computerengineering and related.
- 3+ years (MS) or 5+ years (BS)working experience.
- Familiar with advance verificationmethodology (UVM, VMM, OVM, etc), tools and flow
- Fully experienced verificationflow, including testplan, test, coverage model, testbench, BFM modeling.
- Deep understanding in Verilog andHVL (High-level Verification Language)
加分项：
- Strong programming skills in Perland C/C++is plus
- Having good arch/design experienceis big plus.
- At least good at one of the scriptprograming lanange : Perl, Shell, Ruby, Python, etc.
- Fluent English (both written andspoken) and excellent communication skills
- Proven ability to workindependently as well as in a multi-disciplinary group environment
- Strong analytical skills
工作地点：上海市浦东新区秋月路26号 投递邮箱：heatherl@nvidia.com | 
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发表于 2018-3-6 16:58:34
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