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做完ICC导出了.v文件用v2lvs转成了.sp网表文件，v2lvs命令如下：v2lvs -s smic13g.cdl -s SP013D3_V1p5.sp -s0 VSS -s1 VDD -sk -sn -o TOP_final_fix.sp -v ./TOP_final_fix.output.lvs.v -log v2lvs.run.log
GDS导出之后用calibre检查LVS：calibre -lvs -hier -automatch SmicSPM5PR10R_cal013_mixRF_sali_plmtx_1233_V2_old.lvs |tee -i calibre.lvs.log
发现有几个错误不知道为何：
1）GDS抽取出来的.sp文件部分的标准单元抽成了NOR2X1$_7$这样的名称导致和netlist里的NOR2X1对应不上，从而在LVS报告中没有检查到，不明白为什么
.SUBCKT NOR2X1$_7$ B VDD A Y VSS 6
** N=7 EP=6 IP=0 FDC=4
M0 Y B VSS 6 N12 L=1.3e-07 W=4.2e-07 $X=375 $Y=755 $D=0
M1 VSS A Y 6 N12 L=1.3e-07 W=4.2e-07 $X=885 $Y=755 $D=0
M2 7 B VDD VDD P12 L=1.3e-07 W=8.4e-07 $X=405 $Y=2095 $D=7
M3 Y A 7 VDD P12 L=1.3e-07 W=8.4e-07 $X=715 $Y=2095 $D=7
.ENDS
2）GDS抽取得.sp文件总是比netlist的网表多出一个端口导致了port和net数目错误，例如AOI21X1这个标准单元，这是这个单元在GDS抽出的sp文件中的形式，多出了port是数字7，不太明白这个7是怎么多出来的
.SUBCKT AOI21X1 A1 A0 VDD B0 VSS Y 7
** N=9 EP=7 IP=0 FDC=6
M0 9 A1 VSS 7 N12 L=1.3e-07 W=5.8e-07 $X=645 $Y=735 $D=0
M1 Y A0 9 7 N12 L=1.3e-07 W=5.8e-07 $X=955 $Y=735 $D=0
M2 VSS B0 Y 7 N12 L=1.3e-07 W=4.2e-07 $X=1465 $Y=735 $D=0
M3 VDD A1 8 VDD P12 L=1.3e-07 W=8.4e-07 $X=445 $Y=2080 $D=7
M4 8 A0 VDD VDD P12 L=1.3e-07 W=8.4e-07 $X=955 $Y=2080 $D=7
M5 Y B0 8 VDD P12 L=1.3e-07 W=8.4e-07 $X=1465 $Y=2080 $D=7
.ENDS
下面是AOI21X1这个标准单元在cdl文件中正确的形式
.subckt AOI21X1 Y A0 A1 B0 VDD VSS
M0 hnet11 A1 VSS VSS N12 l=0.13u w=0.58u
M1 Y A0 hnet11 VSS N12 l=0.13u w=0.58u
M2 Y B0 net29 VDD P12 l=0.13u w=0.84u
M3 net29 A1 VDD VDD P12 l=0.13u w=0.84u
M4 net29 A0 VDD VDD P12 l=0.13u w=0.84u
M5 Y B0 VSS VSS N12 l=0.13u w=0.42u
.ends AOI21X1
*.SCALE meter
.GLOBAL VSS VDD
下面是LVS这个标准单元的报错
CELL COMPARISON RESULTS
# # #####################
# # # #
# # INCORRECT #
# # # #
# # #####################
Error: Different numbers of ports (see below).
Error: Different numbers of nets (see below).
Error: Connectivity errors.
layout CELL NAME: AOI21X1
SOURCE CELL NAME: AOI21X1
--------------------------------------------------------------------------------------------------------------
INITIAL NUMBERS OF OBJECTS
--------------------------
Layout Source Component Type
------ ------ --------------
Ports: 7 6 *
Nets: 9 8 *
Instances: 3 3 MN (4 pins)
3 3 MP (4 pins)
------ ------
Total Inst: 6 6
NUMBERS OF OBJECTS AFTER TRANSFORMATION
---------------------------------------
Layout Source Component Type
------ ------ --------------
Ports: 7 6 *
Nets: 8 7 *
Instances: 1 1 MN (4 pins)
3 3 MP (4 pins)
1 1 _sdw2v (4 pins)
------ ------
Total Inst: 5 5
* = Number of objects in layout different from number in source.
**************************************************************************************************************
INCORRECT OBJECTS
**************************************************************************************************************
LEGEND:
-------
ne = Naming Error (same layout name found in source
circuit, but object was matched otherwise).
**************************************************************************************************************
INCORRECT NETS
DISC# LAYOUT NAME SOURCE NAME
**************************************************************************************************************
1 Net VSS VSS
7
-------------------------- --------------------------
--- Devices on layout net 7 ---
(cell ports) (cell ports)
VDD: VDD VDD: VDD
VSS: VSS VSS: VSS
A1: A1 A1: A1
B0: B0 B0: B0
A0: A0 A0: A0
Y: Y Y: Y
7: 7 ** VSS **
M2(1.465,0.735) MN(N12) M5 MN(N12)
g: B0 g: B0
s: Y d: Y
d: VSS s: VSS
b: 7 b: VSS
--- Devices on layout net VSS ---
(cell ports) (cell ports)
VDD: VDD VDD: VDD
VSS: VSS VSS: VSS
A1: A1 A1: A1
B0: B0 B0: B0
A0: A0 A0: A0
Y: Y Y: Y
7: 7 ** VSS **
(_smn2b) (_sdw2v)
in1: A1 in1: A1
in2: A0 in2: A0
out1: Y out1: Y
out2: VSS out2: VSS
Devices:
M0(0.645,0.735) MN(N12) M0 MN(N12)
M1(0.955,0.735) MN(N12) M1 MN(N12)
M2(1.465,0.735) MN(N12) M5 MN(N12)
g: B0 g: B0
s: Y d: Y
d: VSS s: VSS
b: 7 b: VSS
**************************************************************************************************************
INFORMATION AND WARNINGS
**************************************************************************************************************
Matched Matched Unmatched Unmatched Component
Layout Source Layout Source Type
------- ------- --------- --------- ---------
Ports: 7 6 0 0
Nets: 8 7 0 0
Instances: 1 1 0 0 MN(N12)
3 3 0 0 MP(P12)
1 1 0 0 _sdw2v
------- ------- --------- ---------
Total Inst: 5 5 0 0
o Initial Correspondence Points:
Ports: VDD VSS A1 A0 B0 Y
**************************************************************************************************************
DETAILED ERROR ANALYSIS
LAYOUT NAME SOURCE NAME
**************************************************************************************************************
(This section contains detailed error analysis and suggestions for
fixing the layout errors).
--------------------------------------------------------------------------------------------------------------
Bad instance connections
(_smn2b) (_sdw2v)
in1: A1 in1: A1
in2: A0 in2: A0
out1: Y out1: Y
out2: VSS out2: VSS
Devices:
M0(0.645,0.735) MN(N12) M0 MN(N12)
M1(0.955,0.735) MN(N12) M1 MN(N12)
谢谢~~希望路过的有了解的可以指导一下小白 |
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发表于 2017-4-23 16:42:33
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