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[招聘] Cadence上海 招聘高级产品验证工程师/产品工程师-数字后端

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发表于 2017-4-7 18:13:18 | 显示全部楼层 |阅读模式

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投递方式:
If you have interest , PLS send your update CV to job_china@cadence.com(简历投递格式:姓名+学校+申请职位+工作地点)

接受2017年优秀应届硕士、博士生。



高级产品验证工程师—数字后端

1.   Lead Product Validation Engineer
  
Position Description:
This PV engineer mainly works for advanced STA (Static Timing Analysis)and   
DelayCal features validation:
1. Qualify delay calculation and timing analysis result in Innovus system.
2. Maintain comprehensive regression suites for monitoring STA & delayCalst abilities.
3. Upgrading regression cases to use advanced design node data and check the impact.
  
Position Requirements:
1. Master degree or bachelor degree with 2~3 years working experience.
2. Solid background knowledge in digital backend design, knowledge in STA or delayCal is a strong plus.
3. Be familiar with Linux system, and scripting skills with TCL or PERL or Shell.
4. Patient, and good responsibility.
5. Good communication in English and Chinese.

2.   Lead Product Validation Engineer

Position Description:
The engineer will work on Innovus QOR validation. Monitor flow QOR in weekly     
basis, debug QOR issues deeply across whole implementation flow from placement to CTS and to post route optimization. Also need to debug synthesis flow depending on project demand. Also the engineer need to write scripts to improve efficiency.
  
Position Requirements:
1. Master degree or bachelor degree with 2~3 years working experience.
2. Solid background knowledge in digital backend design.
3. Be familiar with Linux system, and scripting skills with TCL or PERL or Shell.
4. Patient, and good responsibility.
5. Good communication in English and Chinese.



3.   Product Validation Engineer II

Position Description:
This engineer will work in Encounter block implementation product validation team. The responsibilities include:
1.Assist in Cadence EDI development and validation Validate and maintain comprehensive unit and flow test cases for Encounter Digital Implementation System.
2.Develop test suites of the new features of EDI functions.

Position Requirements:
1. MS of EE/CS.
2. Digital IC design knowledge is necessary, statistic timing analysis knowledge is a strong plus.
3. Unix System knowledge, vi/TCL/TK/CSH/Perl will be plus.
4. Good communication in English and Chinese, good confidence and self-motivation.



高级产品工程师—数字后端

1. Product Engineer II

Position Description:
1. Design and develop cutting edge technologies of Encounter/Innovus, to address future and immediate customer requirements.
2. Collaborate with R&D and production validation team to deliver high quality software release.
3. Provide technical support and trainings for Cadence AP business.
4. Communicate with global cross-function team to create technical solutions and involve in customer engagement.

Position Requirements:
1. CS/EE MS with 1+years IC physical design experience.
2. Be familiar with ICback-end design flow, including place, route, clock tree synthesis and timing optimization.
3. Strong analysis/debug capability for technical issues.
4. Good team spirit and be able to work under pressure.
5. Good communication skill in English.



2. Lead Product Engineer

Job Description:
1. Design and develop cutting edge technologies of Encounter/Innovus, to address future and immediate customer requirements.
2. Collaborate with R&D and production validation team to deliver high quality software release.
3. Provide technical support and trainings for Cadence AP business.
4. Communicate with global cross-function team to create technical solutions and involve in customer engagement.

Position Requirements:
1. CS/EE MS with 3+years or PhD with 1+ years IC physical design experience.
2. Be familiar with ICback-end design flow, including place, route, clock tree synthesis and timing optimization.
3. Strong analysis/debug capability for technical issues.
4. Good team spirit and be able to work under pressure.
5. Good communication skill in English.



3.   Principal Product Engineer

Job Description:
1. Design and develop power planning and power routing features in Innovus, to address future and immediate customer requirements.
2. Collaborate with R&D for the technical specification of new enhancements. Work with production validation team to deliver high quality software release.
3. Provide technical support and trainings for Cadence AP business.
4. Communicate with global cross-function team to create technical solutions and involve in customer engagement.

Position Requirements:
1. CS/EE MS with 5+ years or PhD with3+ years IC physical design experience.
2. Power planning, routing or DRC fixing experience in design tape-out.
3. Be familiar with IC back-end design flow. Knowledge of LEF/DEF and advanced process node DRC rule is a plus.
4. Strong analysis/debug capability for technical issues.
5. Good team spirit and be able to work under pressure.
6. Good communication skill in English.



实习生—数字后端

1.   Intern-Product Validation

Position Description:
1.Assist in Cadence hierarchical and DB areas development and validation.
2.Validate and maintain comprehensive hierarchical/Database unit and flow test cases for Encounter Digital Implementation System.
3.Develop test suites of the new features of hierarchical and Database functional/flow solution.

Position Requirements:   
1.MS or excellent undergraduate.
2.Digital IC design knowledge is necessary, statistic timing analysis knowledge is a strong plus.
3.Unix System knowledge, vi/TCL/TK/CSH/Perl will be plus.
4.Good communication in English and Chinese, good confidence and self-motivation.
发表于 2018-3-6 12:38:51 | 显示全部楼层
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