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楼主: lotusky

[原创] Hardware Acceleration of EDA Algorithms: Custom ICs, FPGAs and GPUs

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发表于 2012-9-5 22:44:44 | 显示全部楼层
谢谢分享
发表于 2013-4-23 19:50:23 | 显示全部楼层
thank you very much,
发表于 2013-8-1 10:49:55 | 显示全部楼层
good for eda
发表于 2014-3-28 08:20:58 | 显示全部楼层
感謝, 參考看看
发表于 2014-3-28 08:42:52 | 显示全部楼层
感謝, 參考看看
发表于 2014-10-24 12:02:01 | 显示全部楼层
This book deals with the acceleration of EDA algorithms using hardware platforms such as FPGAs and GPUs. Widely applied CAD algorithms are evaluated and compared for potential acceleration on FPGAs and GPUs. Coverage includes discussion of conditions under which it is preferable to use one platform over another, e.g., when an EDA problem has a high degree of data parallelism, the GPU is typically the preferred platform, whereas when the problem has more control, an FPGA may be preferred. Results are presented for the acceleration of several CAD algorithms (fault simulation, fault table generation, model card evaluation in SPICE, Monte Carlo statistical static timing analysis), demonstrating speedups from 30X to 800X.

This book serves as a valuable guide on how best to leverage parallelism to accelerate CAD algorithms. It also presents a methodology to extract automatically SIMD parallelism from regular uniprocessor code. With this approach, uniprocessor code can automatically be converted to GPU code, allowing for significant acceleration. This approach is particularly useful, since different GPUs have vastly different specifications, making the manual generation of GPU code an unscalable proposition.
发表于 2014-10-24 13:28:57 | 显示全部楼层
蛮不错的好资料,谢谢楼主分享哈~O(∩_∩)O~
发表于 2016-2-4 15:43:24 | 显示全部楼层
好东西,支持,谢谢
发表于 2016-3-10 19:32:29 | 显示全部楼层
thansk...
发表于 2016-3-11 00:00:47 | 显示全部楼层
谢谢分享
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