FPGA很繁琐,RTL过了,综合未必过,综合过了,实现未必过,实现过了,bit未必能生成,bit生成,write bit 未必能成功。
我现在的问题是write bit无法成功,即无法烧写成功。
为什么无法成功,ltx文件有问题,解决方案如下:
解决方案
This error is seen when there is a mismatch between a .bit file and .ltx file.
Sometimes changes made in the ILA are not reflected in the .ltx file, causing a mismatch between the .ltx and .bit file.
To work around the issue, please do the following:
Open the synthesized design.
Use the following Tcl command:
write_debug_probes -force filename.ltx
Use the new .ltx file when programing the board.