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Job Summary
As a member of the core backend team, you will be responsible for the physical implementation (from netlist to tapeout) of a highly complex SOC utilizing state of the art process technology.
Description
• Work with FE team to understand chip architecture and drive physical aspects early in design cycle.
• Design automation; Construct, Guide, Modify, Enhance Timing tools and flows.
• Top level floorplan, partition floorpan, P&R, timing and physical sign off.
Key Qualification
• The ideal candidate will have a minimum of 5-8 years of physical design experience, with recent successful tapeouts in deep submicron technology.
• Expert in top /block level P&R implementation, including floorplanning, clock & power distribution, timing closure, physical & electrical verification.
• Experienced in industry standard tools, understand their capabilities and underlying algorithms.
• Strong communication skills.
• Familiar with DC, ICC2 and power sign off tool is a plus
• Experience with DDR, PCIE is a plus
• Strong scripting abilities in PERL are needed; TCL or Python is a plus.
Education
BS/MS CE or EE.
KT Human Resources Consulting Company (Shanghai) was established in 2001 in response to a need for a recruitment consultancy to be an active, contributing member of the semiconductor community, as opposed to simply a supplier to it.We provide professional search and talent acquisition in the Integrated Circuit、Electronic、Telecommunications industry of international corporations in Greater China. Our client list contains numerous international companies, many of them are long-term customers.
If you interested in the job, pls sent your cv to: hr@kthr.com, thanks!
“凯轶—KT咨询”微信也可查询职位啦!打开手机微信,搜号码“KTHR_COM”或查找微信公众帐号“凯轶—KT咨询”即可添加,欢迎大家关注!
或者直接扫我哦!
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