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国内AI芯片研发公司数字后端职位招聘,工作地点:北京、上海,有兴趣欢迎联系我了解详情,微信 18163979512,邮箱daisy@hibohr.com
Senior Digital Backend Design Engineer Job Summary As a member of the core backend team, you will be responsible for the physical implementation (from netlist to tapeout) of a highly complex SOC utilizing state of the art process technology. Description • Work with FE team to understand chip architecture and drive physical aspects early in design cycle. • Design automation; Construct, Guide, Modify, Enhance Timing tools and flows. Top level floorplan, partition floorpan, P&R, timing and physical sign off. Key Qualification • The ideal candidate will have a minimum of 5 years of physical design experience, with recent successful tapeouts in deep submicron technology. • Expert in top /block level P&R implementation, including floorplanning, clock & power distribution, timing closure, physical & electrical verification. • Experienced in industry standard tools, understand their capabilities and underlying algorithms. • Strong communication skills. • Familiar with DC, ICC2 and power sign off tool is a plus. • Experience with DDR, PCIE is a plus. • Strong scripting abilities in PERL are needed; TCL or Python is a plus. • Experience in methodology of Technology under 16nm is a plus. • Experience in large - scale chip design is a plus. Education BS/MS CE or EE. |