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We're hiring!! If you have interest, send email to vicky.cai@amd.com. We're waiting for you!
PREFERRED EXPERIENCE: ·
BS-CS/BS-EE with at least 7 years' experience or MS with at least5 years' experience in FPGA/RTL design ·
Knowledge of PLD/FPGAdesign flow using verilog/Vhdl and EDA tools such as Xilinx Vivado, AlteraQuartus ·
Development experiencewith SoC system, e.g. DDR controller, interconnection bus and embeddedprocessor ·
Experience in digital andAnalog circuit design and debug, camera subsystem experience is a big plus ·
Familiar with labequipment, such as oscilloscope, logic analyzer, spectrum analyzer ·
Disciplined designapproach, and ability to work smoothly with multi teams ·
Strong individual analysis, problem solving skills and teamworkattitude KEY RESPONSIBILITY: ·
Build up camera subsystem on FPGA platform, including camera boarddesign and bring up ·
Develop SoC infrastructureunder multi FPGA chips, porting asic to FPGA and generate bit file, includingsimulation, synthesis and P&R ·
support SW/FW/algorithmdevelopment and debugging on FPGA platform ·
work with ASIC verificationteam to complete ISP function validation on FPGA ·
Maintain FPGA platform,solve subsystem issues, and develop scripts to improve FPGA design flowefficiency. ·
Collaborate and interface with local and global management to makeaccountable deliverables on time
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