在线咨询
eetop公众号 创芯大讲堂 创芯人才网
切换到宽版

EETOP 创芯网论坛 (原名:电子顶级开发网)

手机号码,快捷登录

手机号码,快捷登录

找回密码

  登录   注册  

快捷导航
搜帖子
芯片精品文章合集(500篇!)    创芯人才网--重磅上线啦!
查看: 763|回复: 0

[招聘] AMD Hiring--ASIC Verification engineer (Image Signal Processor)

[复制链接]
发表于 2018-5-24 16:42:10 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

x

We're hiring!! If you have interest,send email to vicky.cai@amd.com. We're waiting for you!


AMD Image Signal Processor (ISP) team has immediate openingof MTS asic verification engineer. The successful candidate would be hired inas staff engineer level, with the expectation that they would have minimal 3-5years of verification experience in the multimedia, image processing or similarindustry. A candidate that has a strong image science background with a focuson image signal processing (ISP) is highly desirable.


PREFERRED EXPERIENCE:

·
BS-CS/BS-EE with at least7 years' experience or MS with at least 5 years' experience in ASIC/SoCverification

·
Hand-on experience in alldomains of complex ASIC DV flow from plan to coverage

·
Experience with designfor verification (assertion based design strategies, code coverage, functionalcoverage, test plan, gate-level simulation, back-annotation etc.)

·
Good knowledge onverification methodologies like UVM is a big plus

·
Good knowledge ofmultimedia/video/camera related image processing

·
Experience in power-awareverification is an asset

·
Strong individualanalysis, problem solving skills and teamwork attitude

·
Will be a plus if havingFPGA validation experience

·
Experience of workingwith multi-site teams is preferred


KEY RESPONSIBILITY:

·
Understand ISP hardwarearchitecture and functional block being designed

·
Build C/C++ model forsimulation, build test bench and monitors for block test environment

·
Participate in block level and IPsubsystem level verification work, simulate and debug the codes in coding stage

·
Compose ASIC specific part of test plan, work with algorithm, firmware andFPGA engineers to prove functional correctness from block level to IP subsystemlevel

·
Support camera SW, FW anddiagnostics team for pre-silicon and post-silicon debugging

·
Maintain verification environment,solve flow issues, and develop scripts to improve flow efficiency.

·
Collaborate and interfacewith local and global management to make accountable deliverables on time

您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /1 下一条

关闭

小黑屋| 关于我们| 联系我们| 在线咨询| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2024-3-28 21:35 , Processed in 0.019895 second(s), 8 queries , Gzip On, Redis On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表