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We're hiring!! If you have interest,send email to vicky.cai@amd.com. We're waiting for you!
AMD Image Signal Processor (ISP) team has immediate openingof MTS asic verification engineer. The successful candidate would be hired inas staff engineer level, with the expectation that they would have minimal 3-5years of verification experience in the multimedia, image processing or similarindustry. A candidate that has a strong image science background with a focuson image signal processing (ISP) is highly desirable.
PREFERRED EXPERIENCE: ·
BS-CS/BS-EE with at least7 years' experience or MS with at least 5 years' experience in ASIC/SoCverification ·
Hand-on experience in alldomains of complex ASIC DV flow from plan to coverage ·
Experience with designfor verification (assertion based design strategies, code coverage, functionalcoverage, test plan, gate-level simulation, back-annotation etc.) ·
Good knowledge onverification methodologies like UVM is a big plus ·
Good knowledge ofmultimedia/video/camera related image processing ·
Experience in power-awareverification is an asset ·
Strong individualanalysis, problem solving skills and teamwork attitude ·
Will be a plus if havingFPGA validation experience ·
Experience of workingwith multi-site teams is preferred
KEY RESPONSIBILITY: ·
Understand ISP hardwarearchitecture and functional block being designed ·
Build C/C++ model forsimulation, build test bench and monitors for block test environment ·
Participate in block level and IPsubsystem level verification work, simulate and debug the codes in coding stage
·
Compose ASIC specific part of test plan, work with algorithm, firmware andFPGA engineers to prove functional correctness from block level to IP subsystemlevel ·
Support camera SW, FW anddiagnostics team for pre-silicon and post-silicon debugging ·
Maintain verification environment,solve flow issues, and develop scripts to improve flow efficiency. ·
Collaborate and interfacewith local and global management to make accountable deliverables on time |