AMD Hiring--Low Power Design Engineer

RecruiterAMD

We're hiring!! If you have interest, pls. send email to nina.zhang@amd.com

Job Responsibilities:

AMDGPU IP team delivers all GPU blocks which are kernel part of our dGPU and APUchips. You'll be working with AMD GPU local and global design teams to improvedesign’s logic and physical quality, power cases and power performance.

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ComprehendGPU’s architecture and consummate graphic IP’s power flow.

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Synthesis and deliver netlist that meeting timing, area and powerrequirement. Resolve formality,  leda and CDC issue. Help PD on thefloorplanning and close timing.

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Analyze clockgating efficiency report to improve RTL quality andoptimize power.

Experience:

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Familiar with verilog RTL design and has experience of digitalasic project.

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Familiar with front-end EDA tools and flows.

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Familiar with C/C++ programming and unix/linux and scripts (tcl,perl etc.)

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Fluent English on talking, presentation and writing documents.

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Work is performed with limited supervision. Strong sense of taskscheduling and deliver on time as predetermined milestones committed tomanager.

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Have the experience of low power logic design or verification is aplus.